General Memory Module Installation Guidelines
This system supports Flexible Memory Configuration, enabling the system to be configured and run in any valid chipset
architectural configuration. The following are the recommended guidelines for best performance:
x4 and x8 DRAM based DIMMs can be mixed. For more information, see Mode-Specific Guidelines.
Populate DIMM sockets only if a processor is installed. For single-processor systems, sockets A1 to A3 are
available. For dual-processor systems, sockets A1 to A3 and sockets B1 to B3 are available.
In a dual-processor configuration, the memory configuration for each processor must be identical. For example,
if you populate socket A1 for processor 1, then populate socket B1 for processor 2, and so on.
Memory modules of different sizes can be mixed provided that other memory population rules are followed (for
example, 2 GB and 4 GB memory modules can be mixed).
If memory modules with different speeds are installed, they will operate at the speed of the slowest installed
memory module(s) or slower depending on system DIMM configuration.
Mode-Specific Guidelines
Three memory channels are allocated to each processor. The allowable configurations depend on the memory mode
selected.
NOTE: x4 and x8 DRAM based DIMMs can be mixed depending on RAS features. However, all guidelines for
specific RAS features must be followed. x4 DRAM based DIMMs retain Single Device Data Correction (SDDC) in
either memory optimized (independent channel) or Advanced ECC modes. x8 DRAM based DIMMs require
Advanced ECC mode to gain SDDC.
The following sections provide additional slot population guidelines for each mode.

Advanced ECC (Lockstep)

Advanced ECC mode extends SDDC from x4 DRAM based DIMMs to both x4 and x8 DRAMs. This protects against single
DRAM chip failures during normal operation. To support Advanced ECC mode, memory modules must be identical in
size, speed, and technology.
Memory sockets A1 and B1 are disabled and do not supported Advanced ECC mode.
DIMMs installed in memory sockets A2 and A3 must match each other. Similar rule applies for DIMMs installed
in memory sockets B2 and B3.
NOTE: Advanced ECC with mirroring is not supported.

Memory Optimized (Independent Channel) Mode

This mode supports SDDC only for memory modules that use x4 device width and does not impose any specific slot
population requirements.

Memory Sparing

NOTE: To use Memory Sparing, all populated channels must have quad-rank DIMMs and Memory Sparing must be
enabled in the System Setup.
In this mode, one rank per channel is reserved as a spare. If persistent correctable errors are detected on a rank, the
data from this rank is copied to the spare rank and the failed rank is disabled.
With Memory Sparing enabled, the system memory available to the operating system is reduced by one rank per
channel. For example, in a dual-processor configuration with six 32 GB quad-rank DIMMs, the available system memory
is: 3/4 (ranks/channel) × 6 (DIMMs) × 32 GB = 144 GB, and not 6 (DIMMs) × 32 GB = 192 GB.
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