EM78P156N

OTP ROM

• Bit 5 (OD5) Control bit is used to enable the open-drain of P65 pin.

• Bit 6 (OD6) Control bit is used to enable the open-drain of P66 pin.

• Bit 7 (OD7) Control bit is used to enable the open-drain of P67 pin.

• IOCC Register is both readable and writable.

7. IOCD (Pull-high Control Register)

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

/PH7

/PH6

/PH5

/PH4

/PH3

/PH2

/PH1

/PH0

• Bit 0 (/PH0) Control bit is used to enable the pull-high of P60 pin. 0: Enable internal pull-high

1: Disable internal pull-high

• Bit 1 (/PH1) Control bit is used to enable the pull-high of P61 pin.

• Bit 2 (/PH2) Control bit is used to enable the pull-high of P62 pin.

• Bit 3 (/PH3) Control bit is used to enable the pull-high of P63 pin.

• Bit 4 (/PH4) Control bit is used to enable the pull-high of P64 pin.

• Bit 5 (/PH5) Control bit is used to enable the pull-high of P65 pin.

• Bit 6 (/PH6) Control bit is used to enable the pull-high of P66 pin.

• Bit 7 (/PH7) Control bit is used to enable the pull-high of P67 pin.

• IOCD Register is both readable and writable.

8. IOCE (WDT Control Register)

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

WDTE

EIS

-

ROC

-

-

-

-

• Bit 7 (WDTE) Control bit used to enable Watchdog timer. 0: Disable WDT.

1: Enable WDT.

WDTE is both readable and writable.

•Bit 6 (EIS) Control bit is used to define the function of P60 (/INT) pin.

0:P60, bi-directional I/O pin.

1:/INT, external interrupt pin. In this case, the I/O control bit of P60 (bit 0 of IOC6) must be set to

"1".

When EIS is "0", the path of /INT is masked. When EIS is "1", the status of /INT pin can also be read by way of reading Port 6 (R6). Refer to Fig. 7(a).

EIS is both readable and writable.

•Bit 4 (ROC) ROC is used for the R-option.

This specification is subject to change without prior notice. 14

07.29.2004 (V1.2)