EM78P156N
OTP ROM
Table 5 The Summary of the Initialized Values for Registers
| Address | Name | Reset Type | Bit 7 |
| Bit 6 |
| Bit 5 |
| Bit 4 |
| Bit 3 |
| Bit 2 |
| Bit 1 |
| Bit 0 |
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| Bit Name | X |
| X |
| X |
| X |
| C53 |
| C52 |
| C51 |
| C50 |
|
| N/A | IOC5 | U |
| U |
| U |
| U |
| 1 | 1 |
| 1 | 1 |
| |||
| /RESET and WDT | U |
| U |
| U |
| U |
| 1 | 1 |
| 1 | 1 |
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| U |
| U |
| U |
| U |
| P |
| P |
| P |
| P |
| |
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| Bit Name | C67 |
| C66 |
| C65 |
| C64 |
| C63 |
| C62 |
| C61 |
| C60 |
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| N/A | IOC6 | 1 | 1 |
| 1 |
| 1 |
| 1 | 1 |
| 1 | 1 |
| ||||
| /RESET and WDT | 1 | 1 |
| 1 |
| 1 |
| 1 | 1 |
| 1 | 1 |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
| |
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| Bit Name | X |
| /INT |
| TS |
| TE |
| PAB |
| PSR2 |
| PSR1 |
| PSR0 |
|
| N/A | CONT | 1 | 0 |
| 1 |
| 1 |
| 1 | 1 |
| 1 | 1 |
| ||||
| /RESET and WDT | 1 | 0 |
| 1 |
| 1 |
| 1 | 1 |
| 1 | 1 |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
| |
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| Bit Name | - |
| - |
| - |
| - |
| - |
| - |
| - |
| - |
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| 0x00 | R0(IAR) | U |
| U |
| U |
| U |
| U |
| U |
| U |
| U |
| |
| /RESET and WDT | P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
| ||
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
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| Bit Name | - |
| - |
| - |
| - |
| - |
| - |
| - |
| - |
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| 0x01 | R1(TCC) | 0 | 0 |
| 0 |
| 0 |
| 0 | 0 |
| 0 | 0 |
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| /RESET and WDT | 0 | 0 |
| 0 |
| 0 |
| 0 | 0 |
| 0 | 0 |
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| P |
| P |
| P |
| P |
| P |
| P |
| P |
| P |
| |
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| Bit Name | - |
| - |
| - |
| - |
| - |
| - |
| - |
| - |
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| 0x02 | R2(PC) | 0 | 0 |
| 0 |
| 0 |
| 0 | 0 |
| 0 | 0 |
| ||||
| /RESET and WDT | 0 | 0 |
| 0 |
| 0 |
| 0 | 0 |
| 0 | 0 |
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| **0/P |
| **0/P |
| **0/P |
| **0/P |
| **1/P |
| **0/P |
| **0/P |
| **0/P |
| |
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| Bit Name | GP2 |
| GP1 |
| GP0 |
| T |
| P |
| Z |
| DC |
| C |
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| 0x03 | R3(SR) | 0 | 0 |
| 0 |
| 1 |
| 1 |
| U |
| U |
| U |
| ||
| /RESET and WDT | 0 | 0 |
| 0 |
| t |
| t |
| P |
| P |
| P |
| |||
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| P |
| P |
| P |
| t |
| t |
| P |
| P |
| P |
| |
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| Bit Name | - |
| - |
| - |
| - |
| - |
| - |
| - |
| - |
|
| 0x04 | R4(RSR) | 1 | 1 |
| U |
| U |
| U |
| U |
| U |
| U |
| ||
| /RESET and WDT | 1 | 1 |
| P |
| P |
| P |
| P |
| P |
| P |
| |||
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| 1 | 1 |
| P |
| P |
| P |
| P |
| P |
| P |
| ||
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| Bit Name | X |
| X |
| X |
| X |
| P53 |
| P52 |
| P51 |
| P50 |
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| 0x05 | P5 | 0 | 0 |
| 0 |
| 0 |
| U |
| U |
| U |
| U |
| ||
| /RESET and WDT | 0 | 0 |
| 0 |
| 0 |
| P |
| P |
| P |
| P |
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| 0 | 0 |
| 0 |
| 0 |
| P |
| P |
| P |
| P |
| ||
| 0x06 | P6 | Bit Name | P67 |
| P66 |
| P65 |
| P64 |
| P63 |
| P62 |
| P61 |
| P60 |
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| U |
| U |
| U |
| U |
| U |
| U |
| U |
| U |
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This specification is subject to change without prior notice. | 22 |
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| 07.29.2004 (V1.2) |