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ELANsat Tech EM78P156N OTP ROM, EM78P156N, 4.5RESET and Wake-up, 1.RESET

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EM78P156N

OTP ROM

4.5RESET and Wake-up1.RESET

A RESET is initiated by one of the following events-

(1)Power on reset.

(2)/RESET pin input "low", or

(3)WDT time-out (if enabled).

The device is kept in a RESET condition for a period of approx. 18ms1 (one oscillator start-up timer period) after the reset is detected. Once the RESET occurs, the following functions are performed. Refer to Fig.9.

•The oscillator is running, or will be started.

•The Program Counter (R2) is set to all "0".

•All I/O port pins are configured as input mode (high-impedance state).

•The Watchdog timer and prescaler are cleared.

•When power is switched on, the upper 3 bits of R3 are cleared.

•The bits of the CONT register are set to all "1" except for the Bit 6 (INT flag).

•The bits of the IOCA register are set to all "1".

•The bits of the IOCB register are set to all "1".

•The IOCC register is cleared.

•The bits of the IOCD register are set to all "1".

•Bit 7 of the IOCE register is set to "1", and Bits 4 and 6 are cleared.

•Bits 0~2 of RF and bits 0~2 of IOCF register are cleared.

The sleep (power down) mode is asserted by executing the “SLEP” instruction. While entering sleep mode, WDT (if enabled) is cleared but keeps on running. The controller can be awakened by-

(1)External reset input on /RESET pin,

(2)WDT time-out (if enabled), or

(3)Port 6 input status changes (if enabled).

The first two cases will cause the EM78P156N to reset. The T and P flags of R3 can be used to determine the source of the reset (wake-up). The last case is considered the continuation of program execution and the global interrupt ("ENI" or "DISI" being executed) decides whether or not the controller branches to the interrupt

1NOTE: Vdd = 5V, set up time period = 16.8ms ± 30% Vdd = 3V, set up time period = 18ms ± 30%

This specification is subject to change without prior notice. 20

07.29.2004 (V1.2)

Contents

8-BIT MICRO-CONTROLLER Version EM78P156N Specification Revision History Version Content Application Note 1. GENERAL DESCRIPTION 2. FEATURES Page 3. PIN ASSIGNMENTS Table 2 EM78P156NAS Pin Description Table 3 EM78P156NKM Pin Description 4. FUNCTION DESCRIPTION 3.R2 (Program Counter) & Stack On-chipProgram Memory Fig. 3 Program Counter Organization Address R PAGE registers IOC PAGE registers CONT IOC5 4. R3 (Status Register) Bit 0 (C) • Bit (DC) (Z) 4.2 Special Purpose Registers 1. A (Accumulator) 2. CONT (Control Register) Bit 3 (PAB) Bit 4 (TE) 3. IOC5 ~ IOC6 (I/O Port Control Register) 4. IOCA (Prescaler Counter Register) 5. IOCB (Pull-downControl Register) Bit 0 (/PD0) Bit 1 (/PD1) Bit 5 (OD5) Bit 6 (OD6) Bit 7 (OD7) 7. IOCD (Pull-highControl Register) Bit 0 (/PH0) 4.3 TCC/WDT & Prescaler 4.4 I/O Ports Fig. 6 The Circuit of I/O Port and I/O Control Register for Port Fig. 7(a) The Circuit of I/O Port and I/O Control Register for P60 (/INT) Fig. 7(b) The Circuit of I/O Port and I/O Control Register for P61~P67 Fig. 7(c) Block Diagram of I/O Port 6 with Input Change Interrupt/Wake-up Table 4 Usage of Port 6 Input Change Wake-up/InterruptFunction (I) (II) Fig. 8 The Circuit of I/O Port with R-option(P50,P51) 4.5RESET and Wake-up 1.RESET Page Table 5 The Summary of the Initialized Values for Registers 2.The Status of RST, T, and P of STATUS Register Table 6 The Values of RST, T and P after RESET Fig. 9 Block Diagram of Controller Reset 4.6 Interrupt 4.7Oscillator 1.Oscillator Modes Table 8 Oscillator Modes Defined by OSC and HLP Table 9 The Summary of Maximum Operating Speeds 2. Crystal Oscillator/Ceramic Resonators (XTAL) Fig. 11 Circuit for External Clock Input Fig. 12 Circuit for Crystal/Resonator Table 10 Capacitor Selection Guide for Crystal Oscillator or Ceramic Resonator 3. External RC Oscillator Mode 4.8CODE Option Register 1. Code Option Register (Word 0) •Bit 12 、11 、10 、9:Not used. Reserved Bit 8 (CLKS) Bit 7(ENWDTB) Bit 6: 4.9Power On Considerations 4.10 External Power On Reset Circuit 4.11 Residue-VoltageProtection Fig. 15 Circuit 1 for the Residue Voltage Protection 4.12 Instruction Set Page Page 4.13 Timing Diagrams AC Test Input/Output Waveform RESET Timing (CLK="0") TCC Input Timing (CLKS="0") 5.ABSOLUTE MAXIMUNM RATINGS EM78P156N 6.ELECTRICAL CHARACTERISTICS 6.2 AC Electrical Characteristic Vih/Vil (Input pins with schmitt inverter) Vth (Input thershold voltage) of I/O pins Voh/Ioh (5V) Vol/Iol (5V) Fig. 21 Port5, Port6 Vol vs. Iol, VDD Vol/Iol (3V) Fig. 22 Port5, Port6 Vol vs. Iol, VDD WDT Time out Cext = 100pF, Typical RC Frequency vs. VDD Typical ICC1 and ICC2 vs. Temperature Maximum ICC1 and ICC2 vs. Temperature Typical ICC3 and ICC4 vs. Temperature Maximum ICC3 and ICC4 vs. Temperature Typical ISB1 and ISB2 vs. Temperature Maximum ISB1 and ISB2 vs. Temperature Page EM78P156N-JHXT EM78P156N-JLXT EM78P156N-GHXT EM78P156N-GLXT APPENDIX Package Information 18-LeadPlastic Small Outline (SOP) — 300 mil 20-LeadPlastic Small Outline (SSOP) — 209 mil Quality Assurance And Reliability Address Trap Detect