EM78P156N

OTP ROM

Setting the ROC to "1" will enable the status of R-option pins (P50∼P51) that are read by the controller. Clearing the ROC will disable the R-option function. If the R-option function is selected, user must connect the P51 pin or/and P50 pin to VSS with a 430KΩ external resistor (Rex). If the Rex is connected/disconnected, the status of P50 (P51) is read as "0"/"1". Refer to Fig. 8.

• Bits 0~3,5 Not used.

9. IOCF (Interrupt Mask Register)

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

-

-

-

-

-

EXIE

ICIE

TCIE

• Bit 0 (TCIE) TCIF interrupt enable bit. 0: disable TCIF interrupt

1: enable TCIF interrupt

• Bit 1 (ICIE) ICIF interrupt enable bit. 0: disable ICIF interrupt

1: enable ICIF interrupt

• Bit 2 (EXIE) EXIF interrupt enable bit. 0: disable EXIF interrupt

1: enable EXIF interrupt

• Bits 3~7 Not used.

• Individual interrupt is enabled by setting its associated control bit in the IOCF to "1".

• Global interrupt is enabled by the ENI instruction and is disabled by the DISI instruction. Refer to Fig. 10.

• IOCF register is both readable and writable.

4.3 TCC/WDT & Prescaler

An 8-bit counter available as prescaler for the TCC or WDT. The prescaler is available for either the TCC or WDT only at any given time, and the PAB bit of the CONT register is used to determine the prescaler assignment. The PSR0~PSR2 bits determine the ratio. The prescaler is cleared each time the instruction is written to TCC under TCC mode. The WDT and prescaler, when assigned to WDT mode, are cleared by the “WDTC” or “SLEP” instructions. Fig. 5 depicts the circuit diagram of TCC/WDT.

•R1 (TCC) is an 8-bit timer/counter. The clock source of TCC can be internal or external clock input (edge selectable from TCC pin). If TCC signal source is from internal clock, TCC will increase by 1 at every instruction cycle (without prescaler). Referring to Fig. 5, CLK=Fosc/2 or CLK=Fosc/4 application is determined by the CODE Option bit CLK status. CLK=Fosc/2 is used if CLK bit is "0", and

This specification is subject to change without prior notice. 15

07.29.2004 (V1.2)