EM78P156N
OTP ROM
The I/O registers and I/O control registers are both readable and writable. The I/O interface circuits for Port 5 and Port 6 are shown in the following Figures 6, 7(a), 7(b), and Figure 8.
| P C R D |
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| Q | P | D |
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| R |
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| _ | C C LK | PC W R | |
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| Q | L |
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P O R T | Q | P | D | IO D |
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| _ | C | C L K | PD W R |
| Q | L |
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| P D R D |
0M U
1X
NOTE:
P C R D
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| Q | P | D |
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| _ | C L K | P C W R | |
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| Q | C |
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| L |
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P 6 0 | / I N T |
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P O R T |
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| _ | C L K | P D W R | |
B i t 6 o f I O C E |
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D | P | Q | 0 | M |
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R | 1 |
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C L K | _ | U |
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| C | Q |
| X |
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| T 1 0 |
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| P D R D |
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| D | P | Q |
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| C L K | _ |
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| C | Q |
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| I N T |
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NOTE:
This specification is subject to change without prior notice. 17 | 07.29.2004 (V1.2) |