EM78P156N
OTP ROM
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| Word 1 |
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| Bit12~Bit0 |
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| Bit12~Bit0 |
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| 1. Code Option Register (Word 0) |
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| WORD 0 |
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| Bit12 | Bit11 |
| Bit10 |
| Bit9 |
| Bit8 | Bit7 |
| Bit6 | Bit5 | Bit4 | Bit3 | Bit2 | Bit1 | Bit0 | |
| - | - |
| - |
| - |
| CLKS | ENWDTB |
| - | HLF | OSC | HLP | PR2 | PR1 | PR0 | |
The bit set to “1” all the time.
•Bit 8 (CLKS): Instruction period option bit.
0:two oscillator periods.
1:four oscillator periods.
Refer to the section on Instruction Set.
•Bit 7(ENWDTB): Watchdog timer enable bit.
0:Enable
1:Disable
•Bit 6: Not used.
Reserved.
The bit set to “1” all the time.
•Bit 5 (HLF): XTAL frequency selection
0:XTAL2 type (low frequency, 32.768KHz)
1:XTAL1 type (high frequency)
This bit will affect system oscillation only when Bit4 (OSC) is “1”. When OSC is”0”, HLF must be “0”. <Note>: The transient point of system frequency between HXT and LXY is around 400 KHz.
•Bit 4 (OSC):Oscillator type selection. 0:RC type
1:XTAL type (XTAL1 and XTAL2)
•Bit 3 (HLP): Power selection.
0:Low power
1:High power
•Bit 2~0 (PR2~PR0): Protect Bit
| PR2~PR0 are protect bits, protect type as following |
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| PR2 | PR1 | PR0 | Protect |
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| 0 | 0 | 0 | Enable |
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| 0 | 0 | 1 | Enable |
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| 0 | 1 | 0 | Enable |
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This specification is subject to change without prior notice. 30 | 07.29.2004 (V1.2) | |||||