ELANsat Tech EM78P156N 4. FUNCTION DESCRIPTION, OTP ROM, EM78P156N, 4.1Operational Registers, 2.R1 (Time Clock /Counter), Fig. 2 Function Block Diagram

EM78P156N

OTP ROM

4. FUNCTION DESCRIPTION

OSCO

OSCI	/RESET				TCC /INT
				WDT timer
Oscillator/Timing
Control						ROM	R2	Stack
				Prescaler
		IOCA
			RAM		Interrupt	Instruction		ALU
					Controller	Register

R1(TCC)

R3

R4Instruction

Decoder

DATA & CONTROL BUS

ACC

		P60//INT
		P61
IOC6	I/O	P62	IOC5	I/O	P50
		P63			P51
	PORT 6			PORT 5
		P64
R6			R5		P52
		P65
					P53
		P66
		P67

Fig. 2 Function Block Diagram

4.1Operational Registers

1.R0 (Indirect Addressing Register)

R0 is not a physically implemented register. Its major function is to perform as an indirect addressing pointer. Any instruction using R0 as a pointer actually accesses data pointed by the RAM Select Register (R4).

2.R1 (Time Clock /Counter)

•Increased by an external signal edge, which is defined by TE bit (CONT-4) through the TCC pin, or by the instruction cycle clock.

•Writable and readable as any other registers.

•Defined by resetting PAB(CONT-3).

•The prescaler is assigned to TCC, if the PAB bit (CONT-3) is reset.

•The contents of the prescaler counter will be cleared only when TCC register is written with a value.

This specification is subject to change without prior notice. 8 07.29.2004 (V1.2)