Care must be taken not to modify the contents of

Interface Rules for the SCSI Firmware

 

RTE required, or the RTE entry ($FFFE079A) RTE required as

 

status code $xx04 above. This intermediate status only

 

happens when the TARGET role is enabled.

 

 

 

 

 

 

CAUTION

 

 

 

 

 

 

 

 

 

 

 

Care must be taken not to modify the contents of

 

 

 

 

 

 

register A3 when the RTE entry is taken.

 

 

 

 

 

 

 

 

 

Rule 3:

 

ALL FINAL RETURNS MUST EXIT (THE

 

 

DRIVER)

 

 

 

 

 

PROPERLY THROUGH RTE, COME-

 

 

AGAIN, OR

 

 

 

 

 

REACTIVATION.

 

 

 

 

 

All final status code returns use bits 15 through 13 of the status word in the packet (second word of the user’s packet) to tell you about the condition of the SCSI firmware and of the SCSI bus.

BIT 15: FINAL=(0)/INTERMEDIATE=(1) STATUS bit. For all final status return codes, this bit is 0.

BIT 14: ADDITIONAL STATUS bit. For all final status returns, if this bit is 1, additional status may be found in the additional status area (CT +$74). If this bit is 0, no additional status is provided.

BIT 13: RTE bit. If this bit is a 0, an RTE is required to finish an interrupt thread. When this bit is 0, A3 contains a pointer to a register save area where D0 through D7 and A0 through A6 were saved. If the RTE is to be executed, the registers in the register save area must first be restored. If this bit is a 1, no RTE is to be executed.

The return mechanism on the final status codes only involve bits 13 of the user status word (packet word 2). You MUST follow the priority scheme below if you wish to interface to the SCSI firmware successfully.

RETURN CODE:

5

5-5

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Emerson MVME147 manual Care must be taken not to modify the contents of