Intel® Server Boards S5000PSL and S5000XSL TPS | Design and Environmental Specifications |
Pin | Signal Name |
61 | Reserved - NC |
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63 | Reserved - NC |
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65 | GND |
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67 | V_LCDCNTL0 |
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69 | Reserved - NC |
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71 | GND |
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73 | V_LCDDATA23 |
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75 | V_LCDDATA22 |
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77 | V_LCDDATA21 |
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79 | V_LCDDATA20 |
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81 | V_LCDDATA19 |
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83 | GND |
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85 | FM_MAN_LAN_TYPE1 |
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87 | FM_MAN_LAN_TYPE2 |
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89 | Reserved - NC |
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91 | Reserved - NC |
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93 | MII_MDC_RMII_SPARE |
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95 | MII_COL_RMIIB_RXER |
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97 | GND |
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99 | MII_TXER_RMIIB_TXEN |
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101 | MII_MDIO_RMIIB_PRESENT |
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103 | GND |
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105 | MII_RXD3_RMIIB_RXD1 |
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107 | MII_RXD2_RMIIB_RXD0 |
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109 | GND |
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111 | MII_RXD1_RMIIA_RXD1 |
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113 | MII_RXD0_RMIIA_RXD0 |
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115 | GND |
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117 | MII_RXCLK |
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119 | MII_RXDV_RMIIA_CRS |
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Pin | Signal Name |
62 | V_LCDDATA4 |
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64 | V_LCDDATA3 |
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66 | V_LCDCNTL1 |
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68 | GND |
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70 | V_LCDDATA15 |
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72 | V_LCDDATA714 |
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74 | V_LCDDATA13 |
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76 | V_LCDDATA12 |
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78 | V_LCDDATA11 |
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80 | GND |
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82 | V_LCDCNTL2 |
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84 | V_DVO_DDC_SDA |
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86 | V_DVO_DDC_SCL |
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88 | RST_PS_PWRGD |
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90 | Reserved - NC |
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|
92 | Reserved - NC |
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|
94 | Reserved - NC |
|
|
96 | GND |
|
|
98 | MII_CRS_RMIIB_CRS |
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100 | MII_TXCLK_RMIIB_RXCLK |
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102 | GND |
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104 | MII_TXD3_RMIIB_TXD1 |
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106 | MII_TXD2_RMIIB_TXD0 |
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108 | GND |
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110 | MII_TXD1_RMIIA_TXD1 |
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112 | MII_TXD0_RMIIA_TXD0 |
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114 | GND |
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116 | MII_TXEN_RMIIA_TXEN |
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118 | MII_RXER_RMIIA_TXER |
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120 | GND |
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5.3.2LCP / AUX IPMB Header
Table 16. LPC / AUX IPMB Header Pin-out (J2J1)
Pin | Signal Name | Description |
1 | SMB_IPMB_5VSB_DAT | BMC IMB 5V standby data line |
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2 | GND | Ground |
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3 | SMB_IPMB_5VSB_CLK | BMC IMB 5V standby clock line |
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4 | P5V_STBY | +5 V standby power |
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Revision 1.2 | 57 |
| Intel order number: |