Design and Environmental Specifications | Intel® Server Boards S5000PSL and S5000XSL TPS |
5.3.3IPMB Header
Table 17. IPMB Header Pin-out (J4J1)
Pin | Signal Name | Description |
1 | SMB_IPMB_5VSB_DAT | BMC IMB 5V Standby Data Line |
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2 | GND | Ground |
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3 | SMB_IPMB_5VSB_CLK | BMC IMB 5V Standby Clock Line |
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5.3.4HSBP Header
Table 18. HSBP Header Pin-out (J1J7, J1J2)
Pin | Signal Name | Description |
1 | SMB_IPMB_5V_DAT | BMC IMB 5V Data Line |
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2 | GND | Ground |
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3 | SMB_IPMB_5V_CLK | BMC IMB 5V Clock Line |
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4 | GND – HSBP_A | Ground for HSBP A |
| P5V – HSBP_B | +5V for HSBP B |
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5.3.5SGPIO Header
Table 19. SGPIO Header Pin-out (J2H1, J1J5)
Pin | Signal Name | Description |
1 | SGPIO_CLOCK | SGPIO Clock Signal |
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2 | SGPIO_LOAD | SGPIO Load Signal |
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3 | SGPIO_DATAOUT | SGPIO Data Out |
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4 | SGPIO_DATAIN | SGPIO Data In |
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5.3.6 | SES I2C |
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| Table 20. SES I2C Header | |
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| Pin | Signal Name | Description |
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| 1 | SMB_SAS_3V3_DAT | BMC SAS 3V Data Line |
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| 2 | GND | Ground |
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| 3 | SMB_SAS_3V3_CLK | BMC SAS 3V Clock Line |
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58 | Revision 1.2 |
| Intel order number: |