Intel® Server Board Set SE8500HW4 | Error Handling |
12. Error Handling
12.1 LEDs
12.1.1POST Progress LEDs
The BIOS provides the current stage of the POST process via a block of eight LEDs. The LEDs are shown in Table 88.
Table 88. POST Progress LED Location and Example
LED Reference Designator |
| Bit | Example: Initialize Memory | |
DS7D2 | 7 | (MSB) |
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DS7D3 | 6 |
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DS7D4 | 5 |
| On |
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DS7D5 | 4 |
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| 0x27 |
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DS7D6 | 3 |
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DS7E1 | 2 |
| On |
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DS7E2 | 1 |
| On |
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DS7E3 | 0 | (LSB) | On |
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| Table 89. POST Progress LED Codes |
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Code | Description |
Host | Processor: |
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0x10 | |
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0x11 | Host processor cache initialization, including Application Processor (AP) |
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0x12 | Starting AP initialization |
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0x13 | SMM initialization |
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Chipset: |
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0x21 | Initializing a chipset component |
Memory: |
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0x22 | Reading configuration data from memory (SPD on DIMM) |
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0x23 | Detecting presence of memory |
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0x24 | Programming timing parameters in the memory controller |
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0x25 | Configuring memory parameters in the memory controller |
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0x26 | Optimizing memory controller settings |
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0x27 | Initializing memory, such as ECC init |
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0x28 | Testing memory |
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PCI Bus: |
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0x50 | Enumerating PCI busses |
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0x51 | Allocating resources to PCI buses |
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0x52 | PCI Hot Plug* controller initialization |
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Revision 1.0 | 111 |
| Intel order number |