Product Overview | Intel® Server Board Set SE8500HW4 | ||
List of Figures |
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Figure 1. | Intel® Server Board Set SE8500HW4, Populated......................................................... | 2 | |
Figure 2. | Intel® Server Board Set SE8500HW4 Interconnect Diagram........................................ | 3 | |
Figure 3. | 5 | ||
Figure 4. Memory Board Outline Diagram ................................................................................. | 21 | ||
Figure 5. Memory Board Component Diagram .......................................................................... | 22 | ||
Figure 6. Memory Board Block Diagram.................................................................................... | 23 | ||
Figure 7. Server Management Block Diagram........................................................................... | 28 | ||
Figure 8. | I2C Block Diagram....................................................................................................... | 29 | |
Figure 9. | External Interfaces to the BMC................................................................................... | 37 | |
Figure 10. | Mainboard Jumper Locations ................................................................................... | 43 | |
Figure 11. | 47 | ||
Figure 12. | Stacked Ethernet Connector..................................................................................... | 52 | |
Figure 13. | Power Distribution Block Diagram ............................................................................ | 57 | |
Figure 14. Typical | 58 | ||
Figure 15. Typical | 59 | ||
Figure 16. | Reset Block Diagram ................................................................................................ | 60 | |
Figure 17. | Interrupt Block Diagram ............................................................................................ | 61 | |
Figure 18. PLD Connections...................................................................................................... | 63 | ||
Figure 19. | Mainboard Outline and Hole Location Drawing ........................................................ | 65 | |
Figure 20. | Mainboard Pin 1 Location Drawing........................................................................... | 66 | |
Figure 21. Memory Board Mechanical Outline Drawing ............................................................ | 67 | ||
Figure 22. Memory Board Pin 1 Location Drawing .................................................................... | 67 | ||
Figure 23. | BIOS Display ............................................................................................................ | 83 | |
Figure 24. | System | Diagnostics Display .................................................................................... | 84 |
viii | Revision 1.0 |
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