Electrical Specifications

Intel® Server Board Set SE8500HW4

8.5Clocks

The Intel® Server Board Set SE8500HW4 clock tree is generated from a single CK409 with spread spectrum capability. The CK409 generates multiple copies of differential pair high-speed clocks. Low skew DB800 buffers generate additional copies.

The FSB clocks must be length-matched. Skew control is also required on the 166HMz MPCLK going to the XMBs and NB, the 66MHz Hub link clocks, and the legacy / LPC 33MHz clocks. Spread spectrum capability is enabled via an I2C access to the CK409, which is connected to the ICH5’s I2C bus and controlled by the system BIOS.

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Revision 1.0

 

Intel order number D22893-001