Intel® Server Board Set SE8500HW4 | Intel® Server Board Set SE8500HW4 Memory Board |
4.5.1.3LEDs
All LEDs are controlled by the BIOS through the Independent Memory Interface (IMI). Table 8 describes the LEDs on the Memory Board.
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| Table 8. Memory Board LEDs |
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Name | Color | Description |
Mirror | Green | Memory Board is in a mirror mode |
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RAID | Green | Memory Board is in a RAID mode |
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Attention | Amber | When flashing, the Memory Board is in a hot plug event |
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Power1 | Green | Memory Board is powered on, all rails are on |
1B | Amber | DIMM_1B has had an error and needs to be replaced |
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1A | Amber | DIMM_1A has had an error and needs to be replaced |
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2B | Amber | DIMM_2B has had an error and needs to be replaced |
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2A | Amber | DIMM_2A has had an error and needs to be replaced |
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1- The power LED provides indication of Memory Board state. It is cleared when the Memory Board is inactive and set when the Memory Board is included in the current memory configuration. It blinks when a request is being serviced during a hot removal or hot add event.
4.5.2Temperature Sensors and FRU
A dual temperature sensing device provides a sensor at the left and right of the DIMM sockets. Server management sees this as one sensor, measuring the temperature drop across the board which estimates the heat generated by the DIMMs.
An EEPROM device provides 256 bytes of programmable
4.5.3I2C
The XMB, temperature sensor controller and FRU device are connected to the Mainboard Baseboard Management Controller. The I2C bus addressing for these devices is slot dependant and located on private I2C bus 3.
4.5.4Independent Memory Interface (IMI)
The Independent Memory Interface (IMI) is simultaneous and
4.5.5Serial Presence Detect (SPD)
The Serial Presence Detect (SPD) bus is a low frequency serial chain that is routed to each DDR2 memory channel. The XMB acts as a master for the SPD bus and uses it to detect and configure the DIMMs.
Revision 1.0 | 25 |
| Intel order number |