Server Management

Intel® Server Board Set SE8500HW4

5.6.1Intelligent Platform Management Buses (IPMB)

The IPMB is a communication protocol that utilizes a 100 KB/s I2C bus. The IPMB implementation in the BMC is compliant with the IPMB v1.0, revision 1.0, with the BMC having an IPMB slave address of 0x20.

The BMC both sends and receives IPMB messages over the IPMB interface. Non-IPMB messages received via the IPMB interface are discarded. In addition to the public IPMB, the BMC has six private I2C buses that extend throughout the system. Table 14 shows all the I2C buses in the Intel® Server Board Set SE8500HW4 and Intel® Server Platform SR4850HW4/SR6850HW4, and Figure 8 shows a graphical representation of these buses.

Table 14. Platform I2C Buses

Physical

Active with

Private

Logical

 

 

Standby

Bus Name

Devices Connected

I2C Bus #

Bus ID

I2C Bus ID

 

Power Only

 

 

 

 

0

Y

-

0

IPMB

Hot Swap Controllers, IPMB Aux

connector, LCD Module

 

 

 

 

 

1

Y

-

2

PCI

PCI Bus slots

 

 

 

 

 

 

 

 

 

 

 

PCA9555, LM93 (2), LM75, FRU,

2

Y

2

5

IO

Power Distribution Board, Power

 

 

 

 

 

Supply Units (2)

 

 

 

 

 

 

3

N

3

7

CS

XMB (4), FC module, NB, PXH,

Intel® IOP332 Storage I/O Processor

4

Y

4

9

Processors

Processors (4)

 

 

 

 

 

 

5

Y

5

B

NIC

On-board Networking

 

 

 

 

 

 

5.6.2Keyboard Controller Style (KCS)/Low Pin Count (LPC) Bus

The BMC has three KCS interface ports as described in the IPMI 2.0 specification. These interfaces are used to communicate SMI handling for error logging, BIOS POST, utility access and power management communication. The BMC also acts as a bridge between the SMS and IPMB interfaces.

5.6.3Inter-Chassis Management Bus (ICMB)

The Intelligent Chassis Management Bus (ICMB) defines a character-level transport for inter- chassis communications between intelligent chassis. This includes the ability to use the ICMB to bridge messages from the IPMB in one chassis to the IPMB in another. At any given time, only one chassis can be driving the bus. Each must arbitrate to gain control of the bus when it has something to send. ICMB messages are IPMI compatible with an implicit net function of bridge. Refer to Intelligent Chassis Management Bus, Version 1.0, Revision 1.20 for the definition of commands and responses. The Intel® Server Board Set SE8500HW4 provides the ICMB interface as an add-in transceiver card connected to the 5-pin ICMB header.

38

Revision 1.0

 

Intel order number D22893-001