National Instruments NI 5102

Chapter4 HardwareOverview

NI5102 User Manual 4-12 ni.com

Figure 4-9 showsthe relevanttiming signals for a typical pretriggered

acquisition. The illustration represents fivepretrigger and five posttrigger

scans,and above-high-level analog triggering is used. See the Analog

TriggerCircuit section later in this chapter for more in formation on analog

trigger types.

Figure4-9. Pretrigger Acquisition

StartTrigger

ScanClock

ScanCounter

TerminalCount

FirstScan FirstPosttrigger Scan

StopTrigger

Endof

Acquisition

=Discarded Points

=Pretrigger Points

=Posttrigger Points

TriggerLevel

PointsDiscarded FivePretrigger, Five Posttrigger

PointsStored

Contents

Main Page Important Information Warranty Copyright Trademarks WARNINGREGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS Compliance FCC/Canada Radio Frequency Interference Compliance* Determining FCC Class FCC/DOC Warnings Class A Compliance to EU Directives Contents Page About This Manual Conventions Used in This Manual Related Documentation Introduction About Your NI 5102 Acquiring Data with Your NI 5102 Figure1-1. TheRelationship Between the Programming Environment, NI-DAQ,and Your Hardware x/ Interactively Controlling your NI 5102 with the Scope Soft Front Panel Help. Note Press F1withthe Soft Front Panel running to access the Scope Soft Fron t Panel NI-SCOPE Driver NI-DAQ API NI Application Software Using PXI with CompactPCI Optional Equipment Installation and Configuration What You Need to Get Started Unpacking Installing the NI 5102 Hardware Configuration Digitizer Basics Understanding Digitizers Nyquist Theorem Analog Bandwidth Sample Rate Vertical Sensitivity ADC Resolution Record Length TriggeringOptions Making Accurate Measurements Page Page Understanding the Probe and Its Effects on Your Waveform Passive Probe How to Compensate Your Probe Page Active and Current Probes NationalInstruments Corporation 4-1 NI5102 User Manual Hardware Overview Figure4-1. NI 5102 (PCI, PXI, ISA) Block Diagram Chapter4 HardwareOverview NI5102 User Manual 4-2 ni.com Figure 4-2 showsa block diagram of the NI 5102 (PCMCIA, USB). I/O Connector Page Page Signal Connections Serial Communications Port (AUX) Analog Input Page ADC Pipeline Delay Acquisition Modes Posttrigger Acquisition Page Page Pretrigger Acquisition Page Page TriggerSources Figure4-10. ScanClock, Start Trigger, and Stop TriggerSignal Sources Analog TriggerCircuit TriggerHold-off Page Random Interleaved Sampling Calibration RTSI Bus Triggerand Clock Lines Figure4-12. RTSIBus Trigger Lines PFI Lines PFI Lines as Inputs PFI Lines as Outputs Page Master/Slave Operation Restrictions Connecting Devices Page A Specifications Input Characteristics Timebase System TransferCharacteristics Dynamic Characteristics S/H Characteristics Stability Triggers Analog Digital (PFI1 and PFI2) RTSI (NI 5102 for PCI, PXI, ISA Only) Power Consumption Physical Maximum Working Voltage Environmental Safety Electromagnetic Compatibility Calibration B Technical Support Resources Web Support NI Developer Zone Customer Education System Integration Worldwide Support Glossary Numbers/Symbols A B C Page D Page E F G H I Page K L M N O P Page R S Page T U V W Z Index A B C D E F H I J L M N O P R S T U V W