2 JP2 D/A Int/Ext Ref Voltage Selection | Omega OME-A822PG guide

2.3.2JP2 : D/A Int/Ext Ref Voltage Selection

Ch 1 = INT Ch 2 = INT (default)

JP2(vref)

Ch 1 =EXT (ExtRef1) Ch 2 =EXT (ExtRef2)

JP2(vref)

Ch 1 = INT Ch 2 =EXT (ExtRef2)

JP2(vref)

Ch 1 =EXT (ExtRef1) Ch 2 = INT

JP2(vref)

If JP2 is set to internal reference, then JP1 should be set to -5V or -10Vinternal reference voltage.

If JP2 is set to external reference, then ExtRef1, CN3 pin 31, is the external reference voltage for D/A channel 1. and ExtRef2, CN3 pin 12, is the external reference voltage for D/A Channel 2.

2.3.3JP3 : Single-ended/Differential Selection

Single-ended (default)

SINGLE

DIFF

Differential

SINGLE

DIFF

The OME-A-822PGL/PGH offers 16 single-ended or 8 differential analog input channels. The JP3 jumper sets the inputs to single-ended or differential mode. You can not select single-ended and differential simultaneously.

Refer to Sec. 2.9 first.

OME-A-822PGL/PGH Hardware Manual ---- 12

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Omega OME-A822PG manual 2 JP2 D/A Int/Ext Ref Voltage Selection, 3 JP3 Single-ended/Differential Selection

Contents

User’sGuide Benelux CanadaMexico Czech Republic OME-A-822PGH/PGL Tables of Contents Introduction Connector Features General Description Analog Inputs SpecificationsPower Consumption 3 A/D Converter Interrupt Channel DA ConverterDigital I/O Programmable Timer/Counter Direct Memory Access Channel DMA Applications Product Check List Hardware Configuration Board Layout I/O Base Address Setting Default base address is Jumper Settings 1 JP1 D/A Internal Reference Voltage Selection 2 JP2 D/A Int/Ext Ref Voltage Selection 3 JP3 Single-ended/Differential Selection 4 JP4 A/D Trigger Source Selection 5 JP5 Interrupt Level Selection 6 JP6 User Timer/Counter Clock Input Selection 7 JP7 DMA Dack Selection JP8 DMA DRQ Selection DRQ JP7 Dack JP8 DMA I/O Register Address Address Read Write Conversion is completed, the Ready bit will clear to zero 1 8254 Counter2 A/D Input Buffer Register 3 D/A Output Latch Register 4 D/I Input Buffer Register Clear Interrupt Request 6 A/D Gain Control Register GAIN3 GAIN2 GAIN1 GAIN0 OME-A-822PGH Gain Control Code Table 7 A/D Multiplex Control Register 8 A/D Mode Control Register 9 A/D Software Trigger Control Register 10 D/O Output Latch Register Digital I/O CN2 8254 Timer/Counter Counter A/D Conversion 1 A/D conversion flow Polling, interrupt and DMA 2 A/D Conversion Trigger Modes 3 A/D Transfer Modes Refer to Sec Using software trigger and polling transferDelay the settling time refer to Sec .4.6 and Sec D/A Conversion Analog Input Signal Connection OME-A-822PGL/PGH Hardware Manual OME-A-822PGL/PGH Hardware Manual Signal Shielding Use a single connection to frame ground not A.GND or D.GND Using OME-DB-8225 CJC Output CN2 Digital Output Pin Assignment CN1/CN2/CN3 Pin AssignmentCN1 Digital Input Pin Assignment SINGLE-ENDED Signal Mode Differential Signals OME-DB-37 Daughter BoardOME-DB-8225 OME-DB-16P Calibration Description of Variable Resistors D/A Calibration A/D Calibration Diagnostic Utility Introduction OME-A-822PGL/PGH Hardware Manual Running The Diagnostic Utility Setup Base address selection screen DMA no and IRQ no selection screen Calibration Function Test Test Test Screen Digital I/O Test Screen Multiplexer Test Screen Use IRQ Test Screen Use DMA Test Screen DA Gain Test Screen Timer 0 Test Screen Special Test Help WARRANTY/DISCLAIMER Temperature