2.5 Digital I/O
The
| Output Latch Register |
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Base+D | Latch | CN2 |
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D0..D7 | D0..D7 | 1..8 | TTL | DI |
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| |||
Power on | Reset | 17..18 |
| DGND |
reset | Reset | DGND |
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| D8..D15 | 9..16 |
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Base+E | Latch |
|
| External |
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| Output Latch Register |
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| Device |
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| Input Buffer Register |
| |
Base+6 | Read | CN1 |
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D0..D7 | D0..D7 | 1..8 | TTL |
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| D8..D15 | 17..18 |
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| DGND |
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Base+7 | Read | 9..16 |
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| Input Buffer Register |
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DO
DGND
External
Device