I/O Base Address Setting | Omega OME-A822PG specification

2.2 I/O Base Address Setting

The OME-A-822PGL/PGH occupies 16 consecutive locations in I/O address space. The base address is set by DIP switch SW1. The default address is 0x220.

A9

A8

A7

A6

A5

A4

ON

	1	2	3	4	5	6
	SW1 : BASE		ADDRESS

BASE	A9	A8	A7	A6	A5		A4
ADDR
200-20F	OFF	ON	ON	ON	ON		ON
210-21F	OFF	ON	ON	ON	ON		OFF
220-22F(;)	OFF	ON	ON	ON	OFF		ON
230-23F	OFF	ON	ON	ON	OFF		OFF
:	:	:	:	:	:		:
300-30F	OFF	OFF	ON	ON	ON		ON
:	:	:	:	:	:		:
3F0-3FF	OFF	OFF	OFF	OFF	OFF

(;) : default base address is 0x220

OME-A-822PGL/PGH Hardware Manual ---- 10

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Omega OME-A822PG manual I/O Base Address Setting, Default base address is

Contents

User’sGuide Canada MexicoBenelux Czech Republic OME-A-822PGH/PGL Tables of Contents Introduction Connector Features General Description Specifications Power ConsumptionAnalog Inputs 3 A/D Converter DA Converter Digital I/OInterrupt Channel Programmable Timer/Counter Direct Memory Access Channel DMA Applications Product Check List Hardware Configuration Board Layout I/O Base Address Setting Default base address is Jumper Settings 1 JP1 D/A Internal Reference Voltage Selection 2 JP2 D/A Int/Ext Ref Voltage Selection 3 JP3 Single-ended/Differential Selection 4 JP4 A/D Trigger Source Selection 5 JP5 Interrupt Level Selection 6 JP6 User Timer/Counter Clock Input Selection 7 JP7 DMA Dack Selection JP8 DMA DRQ Selection DRQ JP7 Dack JP8 DMA I/O Register Address Address Read Write 1 8254 Counter 2 A/D Input Buffer RegisterConversion is completed, the Ready bit will clear to zero 3 D/A Output Latch Register 4 D/I Input Buffer Register Clear Interrupt Request 6 A/D Gain Control Register GAIN3 GAIN2 GAIN1 GAIN0 OME-A-822PGH Gain Control Code Table 7 A/D Multiplex Control Register 8 A/D Mode Control Register 9 A/D Software Trigger Control Register 10 D/O Output Latch Register Digital I/O CN2 8254 Timer/Counter Counter A/D Conversion 1 A/D conversion flow Polling, interrupt and DMA 2 A/D Conversion Trigger Modes 3 A/D Transfer Modes Using software trigger and polling transfer Delay the settling time refer to Sec .4.6 and SecRefer to Sec D/A Conversion Analog Input Signal Connection OME-A-822PGL/PGH Hardware Manual OME-A-822PGL/PGH Hardware Manual Signal Shielding Use a single connection to frame ground not A.GND or D.GND Using OME-DB-8225 CJC Output CN1/CN2/CN3 Pin Assignment CN1 Digital Input Pin AssignmentCN2 Digital Output Pin Assignment SINGLE-ENDED Signal Mode Differential Signals Daughter Board OME-DB-8225OME-DB-37 OME-DB-16P Calibration Description of Variable Resistors D/A Calibration A/D Calibration Diagnostic Utility Introduction OME-A-822PGL/PGH Hardware Manual Running The Diagnostic Utility Setup Base address selection screen DMA no and IRQ no selection screen Calibration Function Test Test Test Screen Digital I/O Test Screen Multiplexer Test Screen Use IRQ Test Screen Use DMA Test Screen DA Gain Test Screen Timer 0 Test Screen Special Test Help WARRANTY/DISCLAIMER Temperature