2.7.2A/D Conversion Trigger Modes
1 : Software Trigger :
Write any value to the A/D software trigger control register, BASE+A, to initiate an A/D conversion cycle. This mode is very simple but it is very difficult to achieve a precise sample rate.
2 : Pacer Trigger Mode :
The block diagram of the pacer timer is shown in section 2.6. The pacer timer can provide a very precise sample rate.
3 : External Trigger Mode :
When a rising edge of an external trigger signal is applied, an A/D conversion will be performed. The external trigger source comes from pin 17 of CN3.
2.7.3A/D Transfer Modes
1 : polling transfer :
This mode can be used with all trigger modes. More detailed information is given in section 2.4.8. The software scans the A/D high byte data register, BASE+5, until READY_BIT=0.The low byte data is available in BASE+4.
2 : interrupt transfer :
This mode can be used with the pacer trigger or external trigger. More detailed information is given in section 2.4.8.The user can set the IRQ level by adjusting jumper JP5. A hardware interrupt signal is sent to the PC when an A/D conversion is
3 : compDMAletedrans. fer :
This mode can be used with the pacer trigger or external trigger. More detailed information is given in section 2.4.8. The user can set the DMA channel by adjusting jumpers JP7 and JP8. Two hardware DMA requests signals are sent sequentially to the PC when an A/D conversion is completed. The single mode transfer of the 8237 is suggested.
