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Hardware Functional Specification S1D13505
Issue Date: 01/02/02 X23A-A-001-14
bit 4 RAS#-to-CAS# Delay Value (NRCD)
This bit selects the DRAM RAS#-to-CAS# delay parameter, tRCD. This bit specifies the number
(NRCD) of MCLK periods (TM) used to create tRCD. NRCD must be chosen to satisfy the RAS#
access time, tRAC. Note, these formulae assume an MCLK duty cycle of 50 +/- 5%.
NRCD = Round-Up((tRAC + 5)/TM - 1) if EDO and NRP = 1 or 2
= 2 if EDO and NRP = 1.5
= Round-Up(tRAC/TM - 1) if FPM and NRP = 1 or 2
= Round-Up(tRAC/TM - 0.45) if FPM and NRP = 1.5
Note that for EDO-DRAM and NRP = 1.5, this bit is automatically forced to 0 to select 2 MCLK for
NRCD. This is done to satisfy the CAS# address setup time, tASC.
The resulting tRC is related to NRCD as follows:
tRCD = (NRCD) TMif EDO and NRP = 1 or 2
tRCD = (1.5) TMif EDO and NRP = 1.5
tRCD = (NRCD + 0.5) TMif FPM and NRP = 1 or 2
tRCD = (NRCD) TMif FPM and NRP = 1.5
bits 3-2 RAS# Precharge Timing Value (NRP) Bits [1:0]
Minimum Memory Timing for RAS# precharge
These bits select the DRAM RAS# Precharge timing parameter, tRP
. These bits specify the number
(NRP) of MCLK periods (TM) used to create tRP – see the following formulae. Note, these formulae
assume an MCLK duty cycle of 50 +/- 5%.
NRP = 1 if (tRP/TM) < 1
= 1.5 if 1 (tRP/TM) < 1.45
= 2 if (tRP/TM) 1.45
The resulting tRC is related to NRP as follows:
tRP = (NRP + 0.5) TMif FPM refresh cycle and NRP = 1 or 2
tRP = (NRP) TMfor all other
Table 8-13: RAS#-to-CAS# Delay Timing Select
REG[22h] bit 4 NRCD RAS#-to-CAS# Delay (tRCD)
022
111