Philips S1D13505 1 S1D13505 Power Consumption

Epson Research and Development Page 3
Vancouver Design Center
Power Consumption S1D13505
Issue Date: 01/02/05 X23A-G-006-03
1 S1D13505 Power Consumption
S1D13505 power consumption is affected by many system design variables.
•Input clock frequency (CLKI): the CLKI frequency determines the LCD frame-rate, CPU perfor-
mance to memory, and other functions – the higher the input clock frequency, the higher the
frame-rate, performance and power consumption.
•CPU interface: the S1D13505 current consumption depends on the BUSCLK frequency, data
width, number of toggling pins, and other factors – the higher the BUSCLK, the higher the CPU
performance and power consumption.
•VDD voltage level: the voltage level affects power consumption – the higher the voltage, the
higher the consumption.
•Display mode: the resolution and color depth affect power consumption – the higher the
resolution/color depth, the higher the consumption.
•Internal CLK divide: internal registers allow the input clock to be divided before going to the
internal logic blocks – the higher the divide, the lower the power consumption.
There are two power save modes in the S1D13505: Software and Hardware SUSPEND. The power
consumption of these modes is affected by various system design variables.
•DRAM refresh mode (CBR or self-refresh): self-refresh capable DRAM allows the S1D13505 to
disable the internal memory clock thereby saving power.
•CPU bus state during SUSPEND: the state of the CPU bus signals during SUSPEND has a
substantial effect on power consumption. An inactive bus (e.g. BUSCLK = low, Addr = low etc.)
reduces overall system power consumption.
���CLKI state during SUSPEND: disabling the CLKI during SUSPEND has substantial power
savings.