Samsung M391B5773DH0 AC & DC Output Measurement Levels, Single Ended AC and DC Output Levels

Models: M391B5773DH0 M391B5273DH0

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Unbuffered DIMM

datasheet

Rev. 1.0

DDR3L SDRAM

11.4 Slew Rate Definition for Single Ended Input Signals

See "Address / Command Setup, Hold and Derating" for single-ended slew rate definitions for address and command signals. See "Data Setup, Hold and Slew Rate Derating" for single-ended slew rate definitions for data signals.

11.5 Slew rate definition for Differential Input Signals

Input slew rate for differential signals (CK, CK and DQS, DQS) are defined and measured as shown in below.

[ Table 9 ] Differential input slew rate definition

Description

Measured

 

Defined by

From

 

To

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VILdiffmax

 

VIHdiffmin

 

VIHdiffmin - VILdiffmax

 

Differential input slew rate for rising edge (CK-CK and DQS-DQS)

 

 

 

Delta TRdiff

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIHdiffmin

 

VILdiffmax

 

VIHdiffmin - VILdiffmax

 

Differential input slew rate for falling edge (CK-CK and DQS-DQS)

 

 

 

Delta TFdiff

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NOTE : The differential signal (i.e. CK -

 

and DQS -

 

 

 

must be linear between these thresholds

 

 

 

 

CK

DQS)

 

 

 

 

 

VIHdiffmin

 

0

 

VILdiffmax

delta TFdiff

delta TRdiff

Figure 6. Differential input slew rate definition for DQS, DQS and CK, CK

12. AC & DC Output Measurement Levels

12.1 Single Ended AC and DC Output Levels

[ Table 10 ] Single Ended AC and DC output levels

Symbol

Parameter

DDR3-800/1066/1333/1600

Units

NOTE

VOH(DC)

DC output high measurement level (for IV curve linearity)

0.8 x VDDQ

V

 

VOM(DC)

DC output mid measurement level (for IV curve linearity)

0.5 x VDDQ

V

 

VOL(DC)

DC output low measurement level (for IV curve linearity)

0.2 x VDDQ

V

 

VOH(AC)

AC output high measurement level (for output SR)

VTT + 0.1 x VDDQ

V

1

VOL(AC)

AC output low measurement level (for output SR)

VTT - 0.1 x VDDQ

V

1

NOTE : 1. The swing of +/-0.1 x VDDQ is based on approximately 50% of the static single ended output high or low swing with a driver impedance of 40and an effective test load of 25to VTT=VDDQ/2.

12.2 Differential AC and DC Output Levels

[ Table 11 ] Differential AC and DC output levels

Symbol

Parameter

DDR3-800/1066/1333/1600

Units

NOTE

VOHdiff(AC)

AC differential output high measurement level (for output SR)

+0.2 x VDDQ

V

1

VOLdiff(AC)

AC differential output low measurement level (for output SR)

-0.2 x VDDQ

V

1

NOTE : 1. The swing of +/-0.2xVDDQis based on approximately 50% of the static single ended output high or low swing with a driver impedance of 40and an effective test load of 25to VTT=VDDQ/2 at each of the differential outputs.

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Samsung M391B5773DH0, M391B5273DH0 AC & DC Output Measurement Levels, Slew Rate Definition for Single Ended Input Signals