SMSC COM20020 manual Timing Diagrams, Multiplexed BUS, 68XX-LIKE Control Signals Read Cycle

TIMING DIAGRAMS

AD0-AD2,

D3-D7

VALID

t1	t2,
nCS	t4

t3

VALID DATA

ALE

nDS

DIR

t5

t9

t6

t7

t8

t10

	Parameter	min	max	units
t1	Address Setup to ALE Low	30		nS
t2	Address Hold from ALE Low	10		nS
t3	nCS Setup to ALE Low	10		nS
t4	nCS Hold from ALE Low	20		nS
t5	ALE Low to nDS Low	15	40	nS
t6	nDS Low to Valid Data			nS
t7	nDS High to Data High Impedance	0	20	nS
t8	Cycle Time (nDS Low to Next Time Low)	4T*		nS
t9	DIR Setup to nDS Active	10		nS
t10	DIR Hold from nDS Inactive	10		nS

*T is the Arbitration Clock Period.

T is identical to XTAL1 if SLOW ARB = 0, T is twice XTAL1 period if SLOW ARB = 1

Note 1: The Microcontroller typically accesses the COM20020 on every other cycle. Therefore, the cycle time specified in the microcontroller's datasheet should be doubled when considering back-to-back COM20020 cycles.

FIGURE 10 - MULTIPLEXED BUS, 68XX-LIKE CONTROL SIGNALS; READ CYCLE

46