50
A0-A2
VALID DATA
VALID
D0-D7
nCS
t6
t1
t7
t3
t5
T is the Arbitration Clock Period.
T is identical to XTAL1 if SLOW ARB = 0,
*
T is twice XTAL1 period if SLOW ARB = 1
t4
t2
The Microcontroller typically accesses the COM20020 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20020 cycles.
Parameter min max units
t1
t2
t3
t4
t5
t6
t7
15
10
5**
0
nS
Address Setup to nRD Active
Address Hold from nRD Inactive
nCS Setup to nRD Active
nCS Hold from nRD Inactive
Cycle Time (nRD Low to Next Time Low)
nRD Low to Valid Data
nRD High to Data High Impedance
4T*
040
20
nS
nS
nS
nS
nS
nS
nCS may become active after control becomes active, but the access time
will now be 45nS measured from the leading edge of nCS.
Note 1:
**
nRD
FIGURE 12 - NON-MULTIPLEXED BUS, 80XX-LIKE CONTROL SIGNALS; READ CYCLE