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Chapter 3 | Hardware |
PC/104 Interface (J1A,B,C,D)
The PC/104 Bus uses a
| NOTE | To conform to the PC/104 standard, keys have been inserted into |
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| specific pins in the PC/104 connector (B10, C19). |
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Table | |||||
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| Pin # | Signal | Description (J1 Row A) | |
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| 1 (A1) | IOCHCHK* | I/O Channel Check – This signal may be activated by ISA boards to | |
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| request that a | |
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| processor. It is driven active to indicate uncorrectable error detection. | |
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| 2 (A2) | SD7 | System Data 7 – This signal (0 to 19) provides a system data bit. | |
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| 3 (A3) | SD6 | System Data 6 – Refer to SD7, | |
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| 4 (A4) | SD5 | System Data 5 – Refer to SD7, | |
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| 5 (A5) | SD4 | System Data 4 – Refer to SD7, | |
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| 6 (A6) | SD3 | System Data 3 – Refer to SD7, | |
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| 7 (A7) | SD2 | System Data 2 – Refer to SD7, | |
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| 8 (A8) | SD1 | System Data 1 – Refer to SD7, | |
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| 9 (A9) | SD0 | System Data 0 – Refer to SD7, | |
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| 10 (A10) | IOCHRDY | I/O Channel Ready – This signal allows slower ISA boards to lengthen | |
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| I/O or memory cycles by inserting wait states. This signal’s normal state | |
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| is active high (ready). ISA boards drive the signal inactive low (not | |
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| ready) to insert wait states. Devices using this signal to insert wait states | |
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| should drive it low immediately after detecting a valid address decode and | |
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| an active read, or write command. The signal is released high when the | |
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| device is ready to complete the cycle. | |
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| 11 (A11) | AEN | Address Enable – This signal is used to degate the system processor and | |
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| other devices from the bus during DMA transfers. When this signal is | |
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| active, the system DMA controller has control of the address, data, and | |
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| read/write signals. This signal should be included as part of ISA board | |
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| select decodes to prevent incorrect board selects during DMA cycles. | |
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| 12 (A12) | SA19 | System Address 19 – This signal (0 to 19) provides a system address bit. | |
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| 13 (A13) | SA18 | System Address 18 – Refer to SA19, | |
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| 14 (A14) | SA17 | System Address 17 – Refer to SA19, | |
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| 15 (A15) | SA16 | System Address 16 – Refer to SA19, | |
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| 16 (A16) | SA15 | System Address 15 – Refer to SA19, | |
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| 17 (A17) | SA14 | System Address 14 – Refer to SA19, | |
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| 18 (A18) | SA13 | System Address 13 – Refer to SA19, | |
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| 19 (A19) | SA12 | System Address 12– Refer to SA19, | |
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| 20 (A20) | SA11 | System Address 11 – Refer to SA19, | |
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| 21 (A21) | SA10 | System Address 10 – Refer to SA19, | |
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| 22 (A22) | SA9 | System Address 9 – Refer to SA19, |
30 | Reference Manual | LittleBoard 550 |