Chapter 3 |
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| Hardware | |
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| Pin # | Signal | Input/ | Description | |
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| Output |
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| 45 | (B15) | +3.3V |
| +3.3 volts ±5% power supply |
| 46 | (B16) | AD20 | T/S | PCI Address and Data Bus Lines 20 – Refer to Pin 3 for more |
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| information. |
| 47 | (B17) | AD23 | T/S | PCI Address and Data Bus Line 23 – Refer to Pin 3 for more |
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| information. |
| 48 | (B18) | GND |
| Ground |
| 49 | (B19) | C/BE3* | T/S | PCI Bus Command/Byte Enable 3 – Refer to Pin 4 for more |
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| information. |
| 50 | (B20) | AD26 | T/S | PCI Address and Data Bus Line 26 – Refer to Pin 3 for more |
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| information. |
| 51 | (B21) | +5V |
| +5 volts ±5% power supply |
| 52 | (B22) | AD30 | T/S | PCI Address and Data Bus Line 30 – Refer to Pin 3 for more |
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| information. |
| 53 | (B23) | GND |
| Ground |
| 54 | (B24) | REQ2* | T/S | Bus Request – This signal indicates this device desires use of the |
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| bus to the arbitrator. |
| 55 | (B25) | VI/O |
| +5 volts ±5% power supply |
| 56 | (B26) | CLK0 | In | PCI clock 0– Refer to Pin 27 for more information |
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| 57 | (B27) | +5V |
| +5 volts ±5% power supply |
| 58 | (B28) | INTD* | O/D | Interrupt D – This signal is used to request interrupts only for |
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| 59 | (B29) | INTA* | O/D | Interrupt A – This signal is used to request an interrupt. |
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| 60 | (B30) | NC |
| Not connected - Reserved |
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| 61 | (C1) | +5 |
| +5 volts ±5% power supply |
| 62 | (C2) | AD01 | T/S | PCI Address and Data Bus Line 1 – Refer to Pin 3 for more |
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| information. |
| 63 | (C3) | AD04 | T/S | PCI Address and Data Bus Lines 4 – Refer to Pin 3 for more |
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| information. |
| 64 | (C4) | GND |
| Ground |
| 65 | (C5) | AD08 | T/S | PCI Address and Data Bus Line 8 – Refer to Pin 3 for more |
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| information. |
| 66 | (C6) | AD10 | T/S | PCI Address and Data Bus Line 10 – Refer to Pin 3 for more |
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| information. |
| 67 | (C7) | GND |
| Ground |
| 68 | (C8) | AD15 | T/S | PCI Address and Data Bus Line 15 – Refer to Pin 3 for more |
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| information. |
| 69 | (C9) | SB0* | NC | Snoop Backoff – Not connected |
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| 70 | (C10) | +3.3V |
| +3.3 volts ±5% power supply |
| 71 | (C11) | LOCK* | S/T/S | Lock – This signal indicates an operation that may require multiple |
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| transactions to complete |
| 72 | (C12) | GND |
| Ground |
| 73 | (C13) | IRDY* | S/T/S | Initiator Ready – This signal indicates the master’s ability to |
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| complete the current data cycle of the transaction |
LittleBoard 550 | Reference Manual | 27 |
