SMSC COM20020 manual Multiplexed BUS, 68XX-LIKE Control Signals Write Cycle

AD0-AD2, D3-D7

nCS

ALE

nDS

DIR

VALID

t1 t2,

t4

t3

t5

t9

VALID DATA

t7

t6

Note 2 t8**

t8

t10

	Parameter	min	max	units
t1	Address Setup to ALE Low	30		nS
t2	Address Hold from ALE Low	10		nS
t3	nCS Setup to ALE Low	10		nS
t4	nCS Hold from ALE Low	20		nS
t5	ALE Low to nDS Low	15		nS
t6	Valid Data Setup to nDS High	30		nS
t7	Data Hold from nDS High	10		nS
t8	Cycle Time (nDS Low to Next Time Low)**	4T*		nS
t9	DIR Setup to nDS Active	10		nS
t10	DIR Hold from nDS Inactive	10		nS

*T is the Arbitration Clock Period.

T is identical to XTAL1 if SLOW ARB = 0, T is twice XTAL1 period if SLOW ARB = 1

Note 1: The Microcontroller typically accesses the COM20020 on every other cycle. Therefore, the cycle time specified in the microcontroller's datasheet should be doubled when considering back-to-back COM20020 cycles.

**Note 2: Any cycle occurring after a write to Address Pointer Low Register requires a minimum of 4T from the trailing edge of nDS to the leading edge of the next nDS.

FIGURE 11 - MULTIPLEXED BUS, 68XX-LIKE CONTROL SIGNALS; WRITE CYCLE

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