
VALID
 t1
 t2, ![]()
t4
nCS
 t3
ALE
nRD  | t5  | 
t6
VALID DATA
t7
t8
  | Parameter  | min  | max  | units  | 
  | 
  | 
  | 
  | 
  | 
t1  | Address Setup to ALE Low  | 30  | 
  | nS  | 
t2  | Address Hold from ALE Low  | 10  | 
  | nS  | 
t3  | nCS Setup to ALE Low  | 10  | 
  | nS  | 
t4  | nCS Hold from ALE Low  | 20  | 
  | nS  | 
t5  | ALE Low to nRD Low  | 15  | 40  | nS  | 
t6  | nRD Low to Valid Data  | 
  | nS  | |
t7  | nRD High to Data High Impedance  | 0  | 20  | nS  | 
t8  | Cycle Time (nRD Low to Next Time Low)  | 4T*  | 
  | nS  | 
  | 
  | 
  | 
  | 
  | 
*T is the Arbitration Clock Period.
T is identical to XTAL1 if SLOW ARB = 0, T is twice XTAL1 period if SLOW ARB = 1
Note 1: The Microcontroller typically accesses the COM20020 on every other cycle. Therefore, the cycle time specified in the microcontroller's datasheet should be doubled when considering 
FIGURE 10A - MULTIPLEXED BUS, 80XX-LIKE  CONTROL SIGNALS; READ CYCLE
47