CC2420

FSTST3 (0x2A) - Frequency Synthesizer Test Register 3

Bit

Field Name

Reset

R/W

15

CHP_CAL_DISABLE

1

R/W

14

CHP_CURRENT_OE

0

R/W

 

 

 

 

13

CHP_TEST_UP

0

R/W

12

CHP_TEST_DN

0

R/W

11

CHP_DISABLE

0

R/W

 

 

 

 

10

PD_DELAY

0

R/W

 

 

 

 

9:8

CHP_STEP_PERIOD[1:0]

2

R/W

 

 

 

 

7:4

STOP_CHP_CURRENT[3:0]

13

R/W

 

 

 

 

3:0

START_CHP_CURRENT[3:0]

13

R/W

 

 

 

 

Description

Disable charge pump during VCO calibration when set.

Charge pump current override enable

0 : Charge pump current set by calibration

1 : Charge pump current set by START_CHP_CURRENT

Forces the CHP to output "up" current when set

Forces the CHP to output "down" current when set

Set to manually disable charge pump by masking the up and down pulses from the phase-detector.

Selects short or long reset delay in phase detector:

0:Short reset delay

1:Long reset delay

The charge pump current value step period:

0:0.25 us

1:0.5 us

2:1 us

3:4 us

The charge pump current to stop at after the current is stepped down from START_CHP_CURRENT after VCO calibration is complete. The current is stepped down periodically with intervals as defined in CHP_STEP_PERIOD.

The charge pump current to start with after VCO calibration is complete. The current is then stepped down periodically to the value STOP_CHP_CURRENT with intervals as defined in

CHP_STEP_PERIOD.

Also used for overriding the charge pump current when CHP_CURRENT_OE=’1’

RXBPFTST (0x2B) - Receiver Bandpass Filters Test Register

Bit

Field Name

Reset

R/W

15

-

0

W0

14

RXBPF_CAP_OE

0

R/W

13:7

RXBPF_CAP_O[6:0]

0

R/W

6:0

RXBPF_CAP_RES[6:0]

0

R

 

 

 

 

Description

Reserved, write as 0.

RX bandpass filter capacitance calibration override enable.

RX bandpass filter capacitance calibration override value.

RX bandpass filter capacitance calibration result.

0:Minimum capacitance in the feedback.

1:Second smallest capacitance setting.

127:Maximum capacitance in the feedback.

FSMSTATE (0x2C) - Finite state machine information

Bit

Field Name

Reset

R/W

15:6

-

0

W0

5:0

FSM_CUR_STATE[5:0]

0

R

 

 

 

 

Description

Reserved, write as 0.

Provides the current state of the FIFO and Frame Control (FFCTRL) finite state machine. See the Radio control state machine section on page 43 for details.

SWRS041B

Page 78 of 89

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Texas Instruments 3138 155 232931 manual FSTST3 0x2A Frequency Synthesizer Test Register