Texas Instruments 3138 155 232931 guide

CC2420

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© 2007, Texas Instruments. All rights reserved.

SWRS041B

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Texas Instruments 3138 155 232931 manual 2007, Texas Instruments. All rights reserved

Contents

Product Description Key FeaturesApplications Table of contents RF Data Buffering Ordering Information General Information ITU-T Abbreviations References Features Operating Conditions Absolute Maximum RatingsParameter Min Max Units Condition Parameter Min Typ Max Units Condition Overall Electrical SpecificationsTransmit Section Parameter Min Typ Max Unit Condition / Note Receive Section Frequency Synthesizer Section Rssi / Carrier SenseIf Section VDD Digital Inputs/Outputs Voltage Regulator Battery MonitorPower Supply CC2420 Pin Pin Name Pin type Pin Description Pin Assignment Avddadc Circuit Description CC2420 simplified block diagram CC2420 Application Circuit Power supply decoupling and filteringInput / output matching Bias resistor Description Overview of external components Transceiver Transceiver Bill of materials for the application circuits Ieee 802.15.4 Modulation Format Symbol Chip sequence C0, C1, C2, … , C31 Phase Configuration Overview SmartRF Studio user interface Evaluation Software Register access 13 4-wire Serial Configuration and Data InterfacePin configuration Parameter Symbol Min Max Units Conditions SPI timing specification Status byte RAM access Configuration registers write and read operations via SPI Address Byte Ordering Name Description CC2420 RAM Memory Space Fifo accessMultiple SPI access Microcontroller Interface and Pin Description Configuration interface Rxfifo overflow Receive mode Pin activity examples during receive Demodulator, Symbol Synchroniser and Data Decision Frame Format Demodulator Simplified Block Diagram MAC protocol data unit Transmitted Synchronisation Header Length field Format of the Frame Control Field FCF Frame check sequence RF Data Buffering Buffered transmit modeBuffered receive mode Fifop Unbuffered, serial mode Acknowledge Frames Address Recognition Acknowledge frame format Radio control state machine Radio control states Keys MAC Security Operations Encryption and AuthenticationNonce / counter Ieee 802.15.4 Nonce In-line security operations CC2420 Security Flag Byte Stand-alone encryption 21.7 CCM CTR mode encryption / decryptionCBC-MAC Mode LMIC Time Linear if and AGC SettingsRssi / Energy Detection Timing RF Level dBm Link Quality IndicationValue Frequency and Channel Programming Clear Channel Assessment VCO and PLL Self-Calibration Output Power ProgrammingVoltage Regulator 27.1 VCO Voltage regulator, simplified schematic Battery Monitor Crystal Oscillator Transmitter Test Modes Input / Output MatchingCrystal oscillator component values Unmodulated carrier CC2420 Modulated spectrum plot System Considerations and Guidelines BER / PER measurements Battery operated systemsLow-cost systems Antenna Considerations PCB Layout Recommendations CC2420 Address Register Register type Description Configuration Registers Saes Configuration registers overview XOSC16MBYPASS Bit Field Name ResetMain 0x10 Main Control Register CCAHYST20 CCAMODE10 Autocrc Autoack Preamblelength MDMCTRL0 0x11 Modem Control RegisterReservedframemode Pancoordinator Adrdecode Rssi 0x13 Rssi and CCA Status and Control Register MDMCTRL1 0x12- Modem Control RegisterCORRTHR40 Demodavgmode Modulationmode RSSIVAL70 Txctrl 0x15 Transmit Control Register Syncword 0x14 Sync Word RXMIXBUFCUR10 RXCTRL0 0x16 Receive control register RXCTRL1 0x17 Receive control register Caldone Calrunning Locklength Lockstatus Fsctrl 0x18 Frequency Synthesizer Control and Status SECMODE10 SECCTRL0 0x19 Security Control Register SECCTRL1 0x1A Security Control Register Battmon 0x1B Battery Monitor Control registerSectxl Secrxl Battmonok Battmonen Battmonvoltage IOCFG1 0x1D I/O Configuration Register IOCFG0 0x1C I/O Configuration RegisterManfidl 0x1E Manufacturer ID, Lower 16 Bit HSSDSRC20 SFDMUX40 CCAMUX40 Fsmtc 0x20 Finite state machine time constants Manfidh 0x1F Manufacturer ID, Upper 16 Bit Isused = is * Isandmask + Isormask Manand 0x21 Manual signal and override register1 Agcctrl 0x23 AGC Control Manor 0x22 Manual signal or override registerVgagainoe Lnamixgainmodeo AGCTST2 0x26 AGC Test Register AGCTST0 0x24 AGC Test RegisterAGCTST1 0x25 AGC Test Register FSTST2 0x29 Frequency Synthesizer Test Register FSTST0 0x27 Frequency Synthesizer Test RegisterFSTST1 0x28 Frequency Synthesizer Test Register Fsmstate 0x2C Finite state machine information FSTST3 0x2A Frequency Synthesizer Test RegisterRxbpftst 0x2B Receiver Bandpass Filters Test Register Dactst 0x2E DAC Test Register AdcclockdisableAdctst 0x2D ADC Test Register Toptst 0x2F Top Level Test Register Oscillator must be running for accessing the RxfifoTxfifo 0x3E Transmit Fifo Byte register Rxfifo 0x3F Receive Fifo Byte register Signal output on CCA pin Description Test Output SignalsCCA test signal select table Signal output on SFD pin Description SFD test signal select table Quad Leadless Package QLP Package Description QLP Package thermal properties Recommended layout for package QLPSoldering information Thermal resistance 40.4 Carrier tape and reel specification 40.3 Plastic tube specificationTube Specification Tape and Reel Specification Revision Date Description/Changes General Information42.1 Document History Product Status Definitions Data Sheet Identification Product Status Definition Product Information Centers Address InformationTI Worldwide Technical Support Internet 2007, Texas Instruments. All rights reserved Important Notice