SPRZ153
TMS320C6201 Silicon Errata
28

EMIF: Data Setup Times

Advisory 2.0.19

Revision(s) Affected: 2.0
Details: The data setup time for the external memory interface is listed in the February 21, 1998
Advanced Information TMSX320C6201 Data Sheet as 2 ns, 3 ns, and 2 ns for full-rate
SBSRAM, half-rate SBSRAM, and SDRAM, respectively. In revision 2.0 of silicon, these
values are to 4.8, 6.0, and 6.4 ns respectively, from worst-case simulation data (low voltage,
high temperature, worst-case process conditions.)
Workaround: In room temperature operation, we have not seen these setup times affect operation except in
the case of SDRAM where it may be limited to 80–95 MHz.

EMIF Extremely Rare Cases Cause an Improper Refresh Cycle to Occur

Advisory 2.0.24

Revision(s) Affected: 2.0
Details: If a trickle refresh is waiting for the EMIF, and the refresh timer counts down and makes the
refresh urgent just as the EMIF grants the request, then CE is held low for only 1/2 SDCLK
cycle during the deactivate command before the refresh. This will result in an invalid
deactivate command. Since the SDRAM did not deactivate the open page, the next activate
command following the refresh will not be executed by the SDRAM. This will cause any
subsequent accesses to go to the non-deactivated page. This will cause corrupt data read and
writes if the page to be opened after the refresh was not the same page that was open before
the refresh. (Internal Reference Number 3453)
Workaround: Increase the refresh period.
7 Documentation Support
For device-specific data sheets and related documentation, visit the TI web site at: http://www.ti.com.
To access documentation on the web site:
1. Go to http://www.ti.com
2. Open the “Products” dialog box and choose “Digital Signal Processors”
3. Scroll to the “TMS320C6000tHighest Performance DSP Platform” and click on “TMS320C62x DSP
Generation”.
4. Click on a device name and then click on the documentation type you prefer.
TMS320C6000 and C62x are trademarks of Texas Instruments.