Intel 8086-1, 8086-2 manual HOLD/HOLD Acknowledge Timing Minimum Mode only

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8086

WAVEFORMS (Continued)

HOLD/HOLD ACKNOWLEDGE TIMING (MINIMUM MODE ONLY)

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Contents CPU Block Diagram Pin ConfigurationBHE LOW BHE/SReady ResetIntr TestHigh LOWRQ/GT0 RQ/GT1ALE IntaDT/R DENFunctional Description BUS Operation Minimum and Maximum ModesMinimum Mode 8086 Typical Configuration Write I/O Read I/OInstruction Fetch Read Data from MemoryAlternate Data extra segment Processor Reset and InitializationAddressing Interrupt OperationsHalt Maskable Interrupt IntrREAD/MODIFY/WRITE Semaphore Operations VIA Lock System TIMING-MINIMUM System External Synchronization VIA TestBUS TIMING-MEDIUM Size Systems Absolute Maximum Ratings Tclcl Minimum Complexity System Timing RequirementsTclch TchclTiming Responses CharacteristicsMinimum Mode Testing INPUT, Output Waveform Testing Load CircuitWaveforms Waveforms Minimum Mode Tinvch CharacteristicsNMI, Test Tgvch TchgxTclmh TclmlTryhsh TchsvTCLCL-45 TCLCL-35 TCLCL-40 TrhavTchdtl TchdthMaximum Mode Waveforms Maximum Mode BUS Lock Signal Timing Maximum Mode Only Reset Timing Asynchronous Signal RecognitionREQUEST/GRANT Sequence Timing Maximum Mode only WaveformsHOLD/HOLD Acknowledge Timing Minimum Mode only Data Transfer Instruction Set SummaryArithmetic Logic 8086 1 reg 1 1 Data Sheet Revision ReviewBit w e Segment 000 001 010 011 100 101 110 111