NEC PD75P308 user manual Main System Clock Oscillator Circuit Characteristics

Page 16

μPD75P308

MAIN SYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS

(Ta = -10 to +70°C, VDD = 5 to ±5 V)

Recommended

Oscillator

 

Constants

Ceramic*3

 

X1

X2

C1

C2

 

VDD

Crystal

 

X1

X2

C1

C2

 

VDD

External Clock

 

X1

X2

 

μPD74HCU04

Item

Conditions

MIN.

TYP.

MAX.

Unit

Oscillation

 

1.0

 

5.0*4

MHz

frequency (fXX)*1

 

 

 

 

 

 

 

 

 

 

 

 

 

Oscillation stabilization

After VDD came to MIN.

 

 

4

ms

time*2

of oscillation voltage range

 

 

 

 

 

 

Oscilaltion

 

1.0

4.19

5.0*4

MHz

frequency (fXX)*1

 

 

 

 

 

 

 

 

 

 

 

 

Oscillation stabilization

 

 

 

10

ms

time*2

 

 

 

 

 

 

 

 

X1 input frequency

 

1.0

 

5.0*4

MHz

(fX)*1

 

 

 

 

 

 

 

 

 

 

 

 

 

X1 input high-, low-level

 

100

 

500

ns

widths (tXH, tXL)

 

 

 

 

 

 

 

 

 

 

 

 

 

*1: The oscillation frequency and X1 input frequency are indicated only to express the characteristics of the oscillator circuit.

For instruction execution time, refer to AC Characteristics.

2:Time required for oscillation to stabilize after VDD reaches the minimum value of the oscillation voltage range or the STOP mode has been released.

3:The oscillators below are recommended.

4: When the oscillation frequency is 4.19 MHz < fx 5.0 MHz, do not select PCC = 0011 as the instruction execution time: otherwise, one machine cycle is set to less than 0.95 μs, falling short of the rated minimum value of 0.95 μs.

Caution: When using the oscillation circuit of the main system clock, wire the portion enclosed in dotted line in the figures as follows to avoid adverse influences on the wiring capacity:

Keep the wiring length as short as possible.

Do not cross the wiring over the other signal lines. Do not route the wiring in the vicinity of lines through which a high alternating current flows.

Always keep the ground point of the capacitor of the oscillator circuit at the same potential as VDD. Do not connect the power source pattern through which a high current flows.

Do not extract signals from the oscillation circuit.

RECOMMENDED OSCILLATION CIRCUIT CONSTANTS

MAIN SYSTEM CLOCK: CERAMIC OSCILLATOR (Ta = -10 to +70°C)

Manufac-

 

 

External Capacitance [pF]

Oscillation

 

Product Name

Voltage Range [V]

 

 

turer

 

 

 

 

 

 

 

C1

C2

MIN.

 

MAX.

 

 

 

 

 

 

 

 

 

 

 

Murata

CSA 2.00MG

30

30

4.75

 

5.25

Mfg.

 

 

 

 

 

 

 

CSA 4.19MG

30

30

4.75

 

5.25

Co., Ltd.

 

 

 

 

 

 

 

 

 

CSA 4.19MGU

30

30

4.75

 

5.25

 

CST 4.19MG

30 pF (internal)

30 pF (internal)

4.75

 

5.25

 

 

 

 

 

 

 

 

16

Image 16
Contents Features DescriptionOrdering Information Quality GradePIN Configuration ΜPD75P308Block Diagram Contents Port Pins PIN FunctionsNON Port Pins PIN INPUT/OUTPUT Circuits Schmitt trigger input with hysteresis characteristicsInput buffer of Cmos standard Type F-B COMIN/OUT SEG Connect capacitor between VDD and P00/INT4, Reset pin Type M-CDifferences Between μPD75P308 and μPD75308 EpromProgram memory address 0 clear mode +12.5 Write mode Verify mode Program inhibit mode Or HWriting and Verifying Prom Program Memory Operation Modes for WRITING/VERIFYING Program MemoryProgram Memory Write Procedure VDD+1Program Memory Read Procedure Erasure μPD75P308K only Electrical Specifications Absolute Maximum Ratings Ta = 25CMain System Clock Oscillator Circuit Characteristics Ta = -10 to +70C, VDD = 5 to ±5Recommended Oscillation Circuit Constants Main System Clock Ceramic Oscillator Ta = -10 to +70CCapacitance Ta = 25C, VDD = 0 DC Characteristics Ta = -10 to +70C, VDD = 5V ±5% Interrupt mode register IM0 AC Characteristics Ta = -10 to + 70C, VDD = 5V ±5%Operation Other Than Serial Transfer Serial Transfer Operation SBI Mode SCK internal clock output master SBI Mode SCK external clock output masterClock Timing AC Timing Test Point excluding X1 and XT1 inputsTI0 Timing Serial Transfer Timing THREE-LINE Serial I/O Mode TWO-LINE Serial I/O ModeSerial Transfer Timing BUS Release Signal Transfer Command Signal TransferReset Input Timing Interrupt Input TimingTa = -10 to +70C Data Retention Timing releasing Stop mode by ResetBTM3 BTM2 BTM1 BTM0 Other than X1 or Program Memory Read Timing Program Memory Write TimingMD0 MD1 Package Drawings PIN Plastic QFP 14×20PIN Ceramic Wqfn Millimeters InchesΜPD75P308GF-3B9 80-pin plastic QFP 14 x 20 mm Recommended Soldering ConditionsVPS Appendix A. Development Tools Prom writing toolsAppendix B. Related Documents Processing of Unused Pins Cmos Devices only Static Electricity ALL MOS DevicesStatus Before Initialization ALL MOS Devices Fix the input level of Cmos devicesMemo