NEC PD75P308 Writing and Verifying Prom Program Memory, Program memory address 0 clear mode

Page 11

μPD75P308

3. WRITING AND VERIFYING PROM (PROGRAM MEMORY)

The program memory of the μPD75P308 is a PROM of 8064 x 8 bits. To write data to or verify the contents of this PROM, the pins listed in the table below are used. Note that no address input pins are provided because the address is updated by the clock input through the X1 pin.

	Pin Name	Function

	VPP	Applies voltage when program memory is written/verified (normally, at VDD potential)

	X1, X2	These pins input clock that updates address when program memory is written/verified. To X2 pin,
	X1, X2	input signal 180º out of phase in respect to signal to X1 pin.


	MD0-MD3	These pins select operation mode when program memory is written/verified.

	P40-P43 (Lower 4)	These pins input/output 8-bit data when program memory is written/verified.
	P50-P53 (Upper 4)
	P50-P53 (Upper 4)

	VDD	Power supply voltage application pin.
	VDD	Apply 5V ± 5% to this pin during normal operation and 6V when program memory is written/verified.

Note 1: Always cover the erasure window of the μPD75P308K with a light-opaque film except when the contents of the program memory are erased.

2:The one-time PROM model μPD75P308GF is not equipped with a window and therefore, the contents of the program memory of this model cannot be erased by exposing it to ultraviolet rays.

3.1OPERATION MODES FOR WRITING/VERIFYING PROGRAM MEMORY

When +6V is applied to the VDD pin of the μPD75P308 with +12.5V applied to the VPP pin, the μPD75P308 is set in the program memory write/verify mode. In this mode, the following operation modes can be set by using the MD0-MD3 pins. At this time, pull down the levels of all the other pins to VSS.

		Operating Mode Specification							Operating Mode

	VPP	VDD	MD0	MD1	MD2	MD3
	VPP	VDD	MD0	MD1	MD2	MD3

			H	L	H	L			Program memory address 0 clear mode

	+12.5 V	+6 V	L	H	H	H			Write mode

			L	L	H	H			Verify mode
			L	L	H	H			Verify mode

			H	x	H	H			Program inhibit mode

						x:	L or H

11

Image 11

Contents Quality Grade FeaturesDescription Ordering InformationΜPD75P308 PIN ConfigurationBlock Diagram Contents PIN Functions Port PinsNON Port Pins Input buffer of Cmos standard Schmitt trigger input with hysteresis characteristicsPIN INPUT/OUTPUT Circuits IN/OUT SEG COMType F-B Type M-C Connect capacitor between VDD and P00/INT4, Reset pinEprom Differences Between μPD75P308 and μPD75308Operation Modes for WRITING/VERIFYING Program Memory Program memory address 0 clear mode+12.5 Write mode Verify mode Program inhibit mode Or H Writing and Verifying Prom Program MemoryVDD+1 Program Memory Write ProcedureProgram Memory Read Procedure Erasure μPD75P308K only Absolute Maximum Ratings Ta = 25C Electrical SpecificationsMain System Clock Ceramic Oscillator Ta = -10 to +70C Main System Clock Oscillator Circuit CharacteristicsTa = -10 to +70C, VDD = 5 to ±5 Recommended Oscillation Circuit ConstantsCapacitance Ta = 25C, VDD = 0 DC Characteristics Ta = -10 to +70C, VDD = 5V ±5% Operation Other Than Serial Transfer AC Characteristics Ta = -10 to + 70C, VDD = 5V ±5%Interrupt mode register IM0 Serial Transfer Operation SBI Mode SCK external clock output master SBI Mode SCK internal clock output masterTI0 Timing AC Timing Test Point excluding X1 and XT1 inputsClock Timing TWO-LINE Serial I/O Mode Serial Transfer Timing THREE-LINE Serial I/O ModeInterrupt Input Timing Serial Transfer Timing BUS Release Signal TransferCommand Signal Transfer Reset Input TimingBTM3 BTM2 BTM1 BTM0 Data Retention Timing releasing Stop mode by ResetTa = -10 to +70C Other than X1 or MD0 MD1 Program Memory Write TimingProgram Memory Read Timing PIN Plastic QFP 14×20 Package DrawingsMillimeters Inches PIN Ceramic WqfnVPS Recommended Soldering ConditionsΜPD75P308GF-3B9 80-pin plastic QFP 14 x 20 mm Prom writing tools Appendix A. Development ToolsAppendix B. Related Documents Fix the input level of Cmos devices Processing of Unused Pins Cmos Devices onlyStatic Electricity ALL MOS Devices Status Before Initialization ALL MOS DevicesMemo