NEC PD75P308 user manual Other than X1 or

Page 26

μPD75P308

DC PROGRAMMING CHARACTERISTICS (Ta = 25 ±5°C, VDD = 6.0±0.25V, VPP = 12.5±0.3V, VSS = 0V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

 

 

 

 

 

 

 

High-Level Input Voltage

VIH1

Other than X1 or X2

0.7 VDD

 

VDD

V

 

 

 

 

 

 

VIH2

X1 and X2

VDD –0.5

 

VDD

V

 

 

 

 

 

 

 

 

 

Low-Level Input Voltage

VIL1

Other than X1 or X2

0

 

0.3 VDD

V

 

 

 

 

 

 

VIL2

X1 and X2

0

 

0.4

V

 

 

 

 

 

 

 

 

 

Input Leakage Current

ILI

VIN = VIL or VIH

 

 

10

μA

 

 

 

 

 

 

 

High-Level Output Voltage

VOH

IOH = –1 mA

VDD –1.0

 

 

V

 

 

 

 

 

 

 

Low-Level Output Voltage

VOL

IOL = 1.6 mA

 

 

0.4

V

 

 

 

 

 

 

 

VDD Supply Current

IDD

 

 

 

30

mA

 

 

 

 

 

 

 

VPP Supply Current

IPP

MD0 = VIL, MD1 = VIH

 

 

30

mA

 

 

 

 

 

 

 

Notes 1: VPP must not exceed +13.5 V, including the overshoot.

2: Apply VDD before VPP and disconnect it after VPP.

AC PROGRAMMING CHARACTERISTICS (Ta = 25±5°C, VDD = 6.0±0.25V, VPP = 12.5±0.3V, VSS = 0V)

 

Parameter

Symbol

*1

Conditions

MIN.

TYP.

MAX.

Unit

 

Address Set-Up Time*2 (vs.MD0↓)

tAS

tAS

 

2

 

 

μs

 

MD1 Set-Up Time (vs. MD0↓)

tM1S

tOES

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

Data Set-Up Time (vs. MD0↓)

tDS

tDS

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

Address Hold Time*2 (vs.MD0−)

tAH

tAH

 

2

 

 

μs

 

Data Hold Time (vs. MD0−)

tDH

tDH

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

MD0 −→ Data Output Float Delay Time

tDF

tDF

 

0

 

130

ns

 

 

 

 

 

 

 

 

 

 

VPP Set-Up Time (vs. MD3−)

tVPS

tVPS

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

VDD Set-Up Time (vs. MD3−)

tVDS

tVCS

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

Initial Program Pulse Width

tPW

tPW

 

0.95

1.0

1.05

ms

 

 

 

 

 

 

 

 

 

 

Additional Program Pulse Width

tOPW

tOPW

 

0.95

 

21.0

ms

 

 

 

 

 

 

 

 

 

 

MD0 Set-Up Time (vs. MD1−)

tMOS

tCES

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

MD0 ↓→ Data Output Delay Time

tDV

tDV

MD0 = MD1 = VIL

 

 

1

μs

 

 

 

 

 

 

 

 

 

 

MD1 Hold Time (vs. MD0−)

tM1H

tOEH

tM1H + tM1R ≥ 50 μs

2

 

 

μs

 

 

 

 

 

 

 

 

 

MD1 Recovery Time (vs. MD0↓)

tM1R

tOR

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Program Counter Reset Time

tPCR

–

 

10

 

 

μs

 

 

 

 

 

 

 

 

 

 

X1 Input High-/Low- Level Width

tXH,tXL

–

 

0.125

 

 

μs

 

 

 

 

 

 

 

 

 

 

X1 Input Frequency

fX

–

 

 

 

4.19

MHz

 

 

 

 

 

 

 

 

 

 

Initial Mode Set Time

tI

–

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

MD3 Set-Up Time (vs. MD1−)

tM3S

–

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

MD3 Hold Time (vs. MD1↓)

tM3H

–

 

2

 

 

μs

 

 

 

 

 

 

 

 

 

 

MD3 Set-Up Time (vs. MD0↓)

tM3SR

–

When data is read from program memory

2

 

 

μs

 

 

 

 

 

 

 

 

 

★

Address*2 → Data Output Delay Time

tDAD

tACC

When data is read from program memory

 

 

2

μs

 

Address*2 → Data Output Hold Time

tHAD

tOH

When data is read from program memory

0

 

130

ns

 

MD3 Hold Time (vs. MD0−)

tM3HR

–

When data is read from program memory

2

 

 

μs

★

 

 

 

 

 

 

 

 

MD3 ↓→ Data Output Float Delay Time

tDFR

–

When data is read from program memory

 

 

2

μs

 

 

 

 

 

 

 

 

 

*1: These symbols are the corresponding μPD27C256 symbols.

2: The internal address signal is incremented by 1 at the fourth rising edge of X1 input. The internal address is not connected to any pin.

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Contents Ordering Information FeaturesDescription Quality GradePIN Configuration ΜPD75P308Block Diagram Contents Port Pins PIN FunctionsNON Port Pins Input buffer of Cmos standard Schmitt trigger input with hysteresis characteristicsPIN INPUT/OUTPUT Circuits IN/OUT SEG COMType F-B Connect capacitor between VDD and P00/INT4, Reset pin Type M-CDifferences Between μPD75P308 and μPD75308 EpromWriting and Verifying Prom Program Memory Program memory address 0 clear mode+12.5 Write mode Verify mode Program inhibit mode Or H Operation Modes for WRITING/VERIFYING Program MemoryProgram Memory Write Procedure VDD+1Program Memory Read Procedure Erasure μPD75P308K only Electrical Specifications Absolute Maximum Ratings Ta = 25CRecommended Oscillation Circuit Constants Main System Clock Oscillator Circuit CharacteristicsTa = -10 to +70C, VDD = 5 to ±5 Main System Clock Ceramic Oscillator Ta = -10 to +70CCapacitance Ta = 25C, VDD = 0 DC Characteristics Ta = -10 to +70C, VDD = 5V ±5% Operation Other Than Serial Transfer AC Characteristics Ta = -10 to + 70C, VDD = 5V ±5%Interrupt mode register IM0 Serial Transfer Operation SBI Mode SCK internal clock output master SBI Mode SCK external clock output masterTI0 Timing AC Timing Test Point excluding X1 and XT1 inputsClock Timing Serial Transfer Timing THREE-LINE Serial I/O Mode TWO-LINE Serial I/O ModeReset Input Timing Serial Transfer Timing BUS Release Signal TransferCommand Signal Transfer Interrupt Input TimingBTM3 BTM2 BTM1 BTM0 Data Retention Timing releasing Stop mode by ResetTa = -10 to +70C Other than X1 or MD0 MD1 Program Memory Write TimingProgram Memory Read Timing Package Drawings PIN Plastic QFP 14×20PIN Ceramic Wqfn Millimeters InchesVPS Recommended Soldering ConditionsΜPD75P308GF-3B9 80-pin plastic QFP 14 x 20 mm Appendix A. Development Tools Prom writing toolsAppendix B. Related Documents Status Before Initialization ALL MOS Devices Processing of Unused Pins Cmos Devices onlyStatic Electricity ALL MOS Devices Fix the input level of Cmos devicesMemo
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