NEC PD75P308 user manual Program Memory Write Timing, Program Memory Read Timing, MD0 MD1

Page 27

μPD75P308

PROGRAM MEMORY WRITE TIMING

 

VPP

tVPS

 

 

 

VPP

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

 

VDD+1

tVDS

 

 

 

VDD

 

 

 

 

VDD

 

 

 

 

 

 

 

 

 

X1

 

 

 

 

 

P40-P43

 

Data input

 

Data

P50-P53

 

output

tI

tDS

 

 

 

 

tOH

tDV

tDF

 

 

MD0

 

 

 

 

 

 

 

tPW

tM1R

 

tMOS

MD1

 

 

 

 

 

 

tPCR

tM1S

tM1H

 

 

MD2

 

 

 

 

 

 

 

tM3S

 

 

 

MD3

 

 

 

 

 

tXH

Data input

tXL

Data input

 

tDS

tDH

tAS

tAH

tOPW

tM3H

PROGRAM MEMORY READ TIMING

 

 

tVPS

 

VPP

VPP

 

 

VDD

 

 

 

 

 

 

 

tVDS

 

VDD

VDD+1

 

 

VDD

tXH

 

 

 

 

 

 

X1

 

tXL

tDAD

 

 

P40-P43

 

tHAD

 

 

Data output

Data output

P50-P53

 

 

tDV

 

 

 

tM3HR

 

 

tI

MD0

 

 

 

MD1

 

 

 

 

 

tPCR

 

MD2

 

 

 

 

 

tM3SR

 

MD3

 

 

 

tDFR

27

Image 27
Contents Quality Grade FeaturesDescription Ordering InformationΜPD75P308 PIN ConfigurationBlock Diagram Contents PIN Functions Port PinsNON Port Pins Schmitt trigger input with hysteresis characteristics PIN INPUT/OUTPUT CircuitsInput buffer of Cmos standard COM Type F-BIN/OUT SEG Type M-C Connect capacitor between VDD and P00/INT4, Reset pinEprom Differences Between μPD75P308 and μPD75308Operation Modes for WRITING/VERIFYING Program Memory Program memory address 0 clear mode+12.5 Write mode Verify mode Program inhibit mode Or H Writing and Verifying Prom Program MemoryVDD+1 Program Memory Write ProcedureProgram Memory Read Procedure Erasure μPD75P308K only Absolute Maximum Ratings Ta = 25C Electrical SpecificationsMain System Clock Ceramic Oscillator Ta = -10 to +70C Main System Clock Oscillator Circuit CharacteristicsTa = -10 to +70C, VDD = 5 to ±5 Recommended Oscillation Circuit ConstantsCapacitance Ta = 25C, VDD = 0 DC Characteristics Ta = -10 to +70C, VDD = 5V ±5% AC Characteristics Ta = -10 to + 70C, VDD = 5V ±5% Interrupt mode register IM0Operation Other Than Serial Transfer Serial Transfer Operation SBI Mode SCK external clock output master SBI Mode SCK internal clock output masterAC Timing Test Point excluding X1 and XT1 inputs Clock TimingTI0 Timing TWO-LINE Serial I/O Mode Serial Transfer Timing THREE-LINE Serial I/O ModeInterrupt Input Timing Serial Transfer Timing BUS Release Signal TransferCommand Signal Transfer Reset Input TimingData Retention Timing releasing Stop mode by Reset Ta = -10 to +70CBTM3 BTM2 BTM1 BTM0 Other than X1 or Program Memory Write Timing Program Memory Read TimingMD0 MD1 PIN Plastic QFP 14×20 Package DrawingsMillimeters Inches PIN Ceramic WqfnRecommended Soldering Conditions ΜPD75P308GF-3B9 80-pin plastic QFP 14 x 20 mmVPS Prom writing tools Appendix A. Development ToolsAppendix B. Related Documents Fix the input level of Cmos devices Processing of Unused Pins Cmos Devices onlyStatic Electricity ALL MOS Devices Status Before Initialization ALL MOS DevicesMemo