NEC PD75P308 user manual Capacitance Ta = 25C, VDD = 0

Page 17

μPD75P308

SUBSYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS (Ta = -10 to +70°C, VDD = 5 V ±5%)

Recommended

Item

Conditions

MIN.

TYP.

MAX.

Unit

Oscillator

Constants

Crystal

XT1

XT2

Oscillation

32

32.768

35

kHz

frequency (fXT)

R

C3

C4

Oscillation stabilization

1.0

2

s

time*

VDD

External Clock

XT1 input frequency

32

100

kHz

XT1

XT2

(fXT)

Open

XT1 input high-, low-level

5

15

μs

widths (tXTH, tXTL)

*: Time required for oscillation to stabilize after VDD reaches the minimum value of the oscillation voltage

range.

Caution: When using the oscillation circuit of the subsystem clock, wire the portion enclosed in dotted line ★ in the figures as follows to avoid adverse influences on the wiring capacity:

•Keep the wiring length as short as possible.

•Do not cross the wiring over the other signal lines. Do not route the wiring in the vicinity of lines through which a high alternating current flows.

•Always keep the ground point of the capacitor of the oscillator circuit at the same potential as VDD. Do not connect the power source pattern through which a high current flows.

•Do not extract signals from the oscillation circuit.

The amplification factor of the subsystem clock oscillation circuit is designed to be low to reduce the current dissipation and therefore, the subsystem clock oscillation circuit is influenced by noise more easily than the main system clock oscillation circuit. When using the subsystem clock, therefore, exercise utmost care in wiring the circuit.

CAPACITANCE (Ta = 25°C, VDD = 0 V)

Parameter	Symbol	Conditions	MIN.	TYP.	MAX.	Unit
Input Capacitance	CIN	f = 1 MHz			15	pF
Output Capacitance	COUT	Pins other than thosemeasured are at 0 V			15	pF
Input/Output	CIO				15	pF
Capacitance					15	pF
Capacitance

17

Image 17

Contents Description FeaturesOrdering Information Quality GradeΜPD75P308 PIN ConfigurationBlock Diagram Contents PIN Functions Port PinsNON Port Pins Input buffer of Cmos standard Schmitt trigger input with hysteresis characteristicsPIN INPUT/OUTPUT Circuits IN/OUT SEG COMType F-B Type M-C Connect capacitor between VDD and P00/INT4, Reset pinEprom Differences Between μPD75P308 and μPD75308+12.5 Write mode Verify mode Program inhibit mode Or H Program memory address 0 clear modeWriting and Verifying Prom Program Memory Operation Modes for WRITING/VERIFYING Program MemoryVDD+1 Program Memory Write ProcedureProgram Memory Read Procedure Erasure μPD75P308K only Absolute Maximum Ratings Ta = 25C Electrical SpecificationsTa = -10 to +70C, VDD = 5 to ±5 Main System Clock Oscillator Circuit CharacteristicsRecommended Oscillation Circuit Constants Main System Clock Ceramic Oscillator Ta = -10 to +70CCapacitance Ta = 25C, VDD = 0 DC Characteristics Ta = -10 to +70C, VDD = 5V ±5% Operation Other Than Serial Transfer AC Characteristics Ta = -10 to + 70C, VDD = 5V ±5%Interrupt mode register IM0 Serial Transfer Operation SBI Mode SCK external clock output master SBI Mode SCK internal clock output masterTI0 Timing AC Timing Test Point excluding X1 and XT1 inputsClock Timing TWO-LINE Serial I/O Mode Serial Transfer Timing THREE-LINE Serial I/O ModeCommand Signal Transfer Serial Transfer Timing BUS Release Signal TransferReset Input Timing Interrupt Input TimingBTM3 BTM2 BTM1 BTM0 Data Retention Timing releasing Stop mode by ResetTa = -10 to +70C Other than X1 or MD0 MD1 Program Memory Write TimingProgram Memory Read Timing PIN Plastic QFP 14×20 Package DrawingsMillimeters Inches PIN Ceramic WqfnVPS Recommended Soldering ConditionsΜPD75P308GF-3B9 80-pin plastic QFP 14 x 20 mm Prom writing tools Appendix A. Development ToolsAppendix B. Related Documents Static Electricity ALL MOS Devices Processing of Unused Pins Cmos Devices onlyStatus Before Initialization ALL MOS Devices Fix the input level of Cmos devicesMemo