NEC PD75P308 Serial Transfer Timing BUS Release Signal Transfer, Command Signal Transfer

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μPD75P308

SERIAL TRANSFER TIMING

BUS RELEASE SIGNAL TRANSFER

SCK

tKSB

 

 

 

 

 

tSBL

 

 

 

 

 

tSBH

 

 

 

 

 

tSBK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SB0,1

tKCY3,4

tKL3,4

 

 

 

 

 

 

 

tKH3,4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tSIK3,4

tKSI3,4

tKSO3,4

COMMAND SIGNAL TRANSFER

SCK

tKSB

 

 

 

 

 

tSBK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SB0,1

tKCY3,4

tKL3,4

 

 

 

 

 

 

 

tKH3,4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tSIK3,4

tKSI3,4

tKSO3,4

INTERRUPT INPUT TIMING

INT0, 1, 2, 4

KR0-7

tINTL

tINTH

RESET INPUT TIMING

RESET

tRSL

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Contents Features DescriptionOrdering Information Quality GradePIN Configuration ΜPD75P308Block Diagram Contents Port Pins PIN FunctionsNON Port Pins Schmitt trigger input with hysteresis characteristics PIN INPUT/OUTPUT CircuitsInput buffer of Cmos standard COM Type F-BIN/OUT SEG Connect capacitor between VDD and P00/INT4, Reset pin Type M-CDifferences Between μPD75P308 and μPD75308 EpromProgram memory address 0 clear mode +12.5 Write mode Verify mode Program inhibit mode Or HWriting and Verifying Prom Program Memory Operation Modes for WRITING/VERIFYING Program MemoryProgram Memory Write Procedure VDD+1Program Memory Read Procedure Erasure μPD75P308K only Electrical Specifications Absolute Maximum Ratings Ta = 25CMain System Clock Oscillator Circuit Characteristics Ta = -10 to +70C, VDD = 5 to ±5Recommended Oscillation Circuit Constants Main System Clock Ceramic Oscillator Ta = -10 to +70CCapacitance Ta = 25C, VDD = 0 DC Characteristics Ta = -10 to +70C, VDD = 5V ±5% AC Characteristics Ta = -10 to + 70C, VDD = 5V ±5% Interrupt mode register IM0Operation Other Than Serial Transfer Serial Transfer Operation SBI Mode SCK internal clock output master SBI Mode SCK external clock output masterAC Timing Test Point excluding X1 and XT1 inputs Clock TimingTI0 Timing Serial Transfer Timing THREE-LINE Serial I/O Mode TWO-LINE Serial I/O ModeSerial Transfer Timing BUS Release Signal Transfer Command Signal TransferReset Input Timing Interrupt Input TimingData Retention Timing releasing Stop mode by Reset Ta = -10 to +70CBTM3 BTM2 BTM1 BTM0 Other than X1 or Program Memory Write Timing Program Memory Read TimingMD0 MD1 Package Drawings PIN Plastic QFP 14×20PIN Ceramic Wqfn Millimeters InchesRecommended Soldering Conditions ΜPD75P308GF-3B9 80-pin plastic QFP 14 x 20 mmVPS Appendix A. Development Tools Prom writing toolsAppendix B. Related Documents Processing of Unused Pins Cmos Devices only Static Electricity ALL MOS DevicesStatus Before Initialization ALL MOS Devices Fix the input level of Cmos devicesMemo