NEC PD75P308 user manual Com, Type F-B, In/Out Seg

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						μPD75P308
TYPE F–A			VDD	TYPE G–B
			VDD
				V LC0
	P.U.R.			P-ch
	P.U.R.		P–ch
	enable		P–ch	V LC1
	enable

data			IN/OUT		P-ch	N-ch
					P-ch	N-ch
	Type D
output	Type D
output						OUT
disable				COM		OUT
				COM
				data	N-ch	P-ch
	Type B				N-ch	P-ch
	Type B			V LC2
				V LC2
	P.U.R. : Pull–Up Resistor			N-ch
TYPE F–B			VDD	TYPE G– C
			VDD
			P.U.R.	V DD
			P.U.R.
	P.U.R.				P-ch
	P.U.R.		P–ch
output	enable		P–ch	V LC0
	enable	VDD

disable
disable
(P)				V LC1
			P-ch	V LC1
			P-ch
data			IN/OUT			P-ch
				SEG		P-ch

output						OUT
output			N-ch	data/Bit Port data		OUT
disable			N-ch			N-ch
disable						N-ch
output
disable				V LC2
	(N)			V LC2
	(N)
P.U.R. : Pull–Up Resistor						N-ch
P.U.R. : Pull–Up Resistor
TYPE G–A				TYPE M–A
V LC0	P-ch					IN/OUT
						IN/OUT

V LC1				data	N-ch
V LC1					N-ch
SEG			P-ch	output
SEG			OUT	disable
data			OUT
data			N-ch
			N-ch
V LC2
		N-ch		Middle voltage input buffer

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Contents Features DescriptionOrdering Information Quality GradePIN Configuration ΜPD75P308Block Diagram Contents Port Pins PIN FunctionsNON Port Pins Input buffer of Cmos standard Schmitt trigger input with hysteresis characteristicsPIN INPUT/OUTPUT Circuits IN/OUT SEG COMType F-B Connect capacitor between VDD and P00/INT4, Reset pin Type M-CDifferences Between μPD75P308 and μPD75308 EpromProgram memory address 0 clear mode +12.5 Write mode Verify mode Program inhibit mode Or HWriting and Verifying Prom Program Memory Operation Modes for WRITING/VERIFYING Program MemoryProgram Memory Write Procedure VDD+1Program Memory Read Procedure Erasure μPD75P308K only Electrical Specifications Absolute Maximum Ratings Ta = 25CMain System Clock Oscillator Circuit Characteristics Ta = -10 to +70C, VDD = 5 to ±5Recommended Oscillation Circuit Constants Main System Clock Ceramic Oscillator Ta = -10 to +70CCapacitance Ta = 25C, VDD = 0 DC Characteristics Ta = -10 to +70C, VDD = 5V ±5% Operation Other Than Serial Transfer AC Characteristics Ta = -10 to + 70C, VDD = 5V ±5%Interrupt mode register IM0 Serial Transfer Operation SBI Mode SCK internal clock output master SBI Mode SCK external clock output masterTI0 Timing AC Timing Test Point excluding X1 and XT1 inputsClock Timing Serial Transfer Timing THREE-LINE Serial I/O Mode TWO-LINE Serial I/O ModeSerial Transfer Timing BUS Release Signal Transfer Command Signal TransferReset Input Timing Interrupt Input TimingBTM3 BTM2 BTM1 BTM0 Data Retention Timing releasing Stop mode by ResetTa = -10 to +70C Other than X1 or MD0 MD1 Program Memory Write TimingProgram Memory Read Timing Package Drawings PIN Plastic QFP 14×20PIN Ceramic Wqfn Millimeters InchesVPS Recommended Soldering ConditionsΜPD75P308GF-3B9 80-pin plastic QFP 14 x 20 mm Appendix A. Development Tools Prom writing toolsAppendix B. Related Documents Processing of Unused Pins Cmos Devices only Static Electricity ALL MOS DevicesStatus Before Initialization ALL MOS Devices Fix the input level of Cmos devicesMemo