User's Guide
DDR2 Memory Controller
1Introduction
This document describes the DDR2 memory controller in the TMS320C642x Digital Signal Processor (DSP).
1.1Purpose of the Peripheral
The DDR2 memory controller is used to interface with
1.2Features
The DDR2 memory controller supports the following features:
∙
∙256 Mbyte memory space
∙Data bus width of 32 or 16 bits (see the
∙CAS latencies: 2, 3, 4, and 5
∙Internal banks: 1, 2, 4, and 8
∙Burst length: 8
∙Burst type: sequential
∙1 CS signal
∙Page sizes: 256, 512, 1024, and 2048
∙SDRAM autoinitialization
∙
∙Prioritized refresh
∙Programmable refresh rate and backlog counter
∙Programmable timing parameters
∙
DDR2 Memory Controller | 7 | |
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