Cypress 37000 CPLD manual Synchronous, Product Term, Operating Frequency Parameters, Reset/Preset

Page 19

Ultra37000 CPLD Family

Switching Characteristics Over the Operating Range [12]

 

 

 

200 MHz

167 MHz

154 MHz

143 MHz

125 MHz

100 MHz

83 MHz

66 MHz

 

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Combinatorial

Mode

Parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPD[13, 14, 15]

 

6

 

6.5

 

7.5

 

8.5

 

10

 

12

 

15

 

20

ns

tPDL[13, 14, 15]

 

11

 

12.5

 

14.5

 

16

 

16.5

 

17

 

19

 

22

ns

tPDLL[13, 14, 15]

 

12

 

13.5

 

15.5

 

17

 

17.5

 

18

 

20

 

24

ns

t

[13, 14, 15]

 

8

 

8.5

 

11

 

13

 

14

 

16

 

19

 

24

ns

EA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tER[11, 13]

 

8

 

8.5

 

11

 

13

 

14

 

16

 

19

 

24

ns

Input Register

Parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tWL

 

2.5

 

2.5

 

2.5

 

2.5

 

3

 

3

 

4

 

5

 

ns

tWH

 

2.5

 

2.5

 

2.5

 

2.5

 

3

 

3

 

4

 

5

 

ns

tIS

 

 

2

 

2

 

2

 

2

 

2

 

2.5

 

3

 

4

 

ns

tIH

 

 

2

 

2

 

2

 

2

 

2

 

2.5

 

3

 

4

 

ns

tICO[13, 14, 15]

 

11

 

11

 

11

 

12.5

 

12.5

 

16

 

19

 

24

ns

tICOL[13, 14, 15]

 

12

 

12

 

12

 

14

 

16

 

18

 

21

 

26

ns

Synchronous

Clocking Parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCO [14, 15]

 

4

 

4

 

4.5

 

6

 

6.5[16]

 

6.5[17]

 

8[18]

 

10

ns

tS[13]

4

 

4

 

5

 

5

 

5.5[16]

 

6[17]

 

8[18]

 

10

 

ns

tH

 

 

0

 

0

 

0

 

0

 

0

 

0

 

0

 

0

 

ns

tCO2[13, 14, 15]

 

9.5

 

10

 

11

 

12

 

14

 

16

 

19

 

24

ns

t

 

[13]

5

 

6

 

6.5

 

7

 

8[16]

 

10

 

12

 

15

 

ns

SCS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

t

[13]

7.5

 

7.5

 

8.5

 

9

 

10

 

12

 

15

 

15

 

ns

SL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tHL

 

 

0

 

0

 

0

 

0

 

0

 

0

 

0

 

0

 

ns

Product Term

Clocking Parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCOPT[13, 14, 15]

 

7

 

10

 

10

 

13

 

13

 

13

 

15

 

20

ns

tSPT

 

2.5

 

2.5

 

2.5

 

3

 

5

 

5.5

 

6

 

7

 

ns

tHPT

 

2.5

 

2.5

 

2.5

 

3

 

5

 

5.5

 

6

 

7

 

ns

tISPT[13]

0

 

0

 

0

 

0

 

0

 

0

 

0

 

0

 

ns

tIHPT

6

 

6.5

 

6.5

 

7.5

 

9

 

11

 

14

 

19

 

ns

tCO2PT[13, 14,

 

12

 

14

 

15

 

19

 

19

 

21

 

24

 

30

ns

15]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pipelined Mode Parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

t

[13]

5

 

6

 

6

 

7

 

8[16]

 

10

 

12

 

15

 

ns

 

ICS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Operating Frequency Parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

fMAX1

200

 

167

 

154

 

143

 

125[16]

 

100

 

83

 

66

 

MHz

fMAX2

200

 

200

 

200

 

167

 

154

 

153[17]

 

125[18]

 

100

 

MHz

fMAX3

125

 

125

 

105

 

91

 

83

 

80[17]

 

62.5

 

50

 

MHz

fMAX4

167

 

167

 

154

 

125

 

118

 

100

 

83

 

66

 

MHz

Reset/Preset

Parameters

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tRW

8

 

8

 

8

 

8

 

10

 

12

 

15

 

20

 

ns

tRR[13]

10

 

10

 

10

 

10

 

12

 

14

 

17

 

22

 

ns

Notes:

16.The following values correspond to the CY37512 and CY37384 devices: tCO = 5 ns, tS = 6.5 ns, tSCS = 8.5 ns, tICS = 8.5 ns, fMAX1 = 118 MHz.

17.The following values correspond to the CY37192V and CY37256V devices: tCO = 6 ns, tS = 7 ns, fMAX2 = 143 MHz, fMAX3 = 77 MHz, and fMAX4 = 100 MHz; and

for the CY37512 devices: tS = 7 ns.

18.The following values correspond to the CY37512V and CY37384V devices: tCO = 6.5 ns, tS = 9.5 ns, and fMAX2 = 105 MHz.

Document #: 38-03007 Rev. *E

Page 19 of 64

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Contents Cypress Semiconductor Corporation FeaturesUltra37000 5.0V Devices Ultra37000V 3.3V DevicesSelection Guide Programmable Interconnect Matrix Architecture Overview of Ultra37000 FamilyLogic Block Ultra37000 Macrocell Product Term AllocatorO and Buried Macrocells Timing Model Input MacrocellJtag and PCI Standards Development Software SupportThird-Party Programmers CY37032/CY37032V Logic Block DiagramsCY37064/CY37064VInput CY37192/CY37192V CY37128/CY37128VCY37256/CY37256V Logic Block DiagramsTMS CY37384/CY37384VCY37512/CY37512V Output Condition 0V Device Characteristics Maximum RatingsOperating Range2 RangeCapacitance5 Endurance Characteristics53V Device Characteristics Maximum Ratings Inductance5AC Characteristics Switching Characteristics Over the Operating Range User Option Parameters Pipelined Mode ParametersReset/Preset Parameters Parameter Description Unit Product Term Clocking ParametersOperating Frequency Parameters Reset/PresetSynchronous Product TermCombinatorial Output Switching WaveformsUser Option Jtag TimingLatched Output Clock to Clock Registered InputLatched Input Latched Input and Output Asynchronous ResetAsynchronous Preset Output Enable/DisableTypical 5.0V Power Consumption CY37032 Power ConsumptionCY37064 CY37192 Typical 5.0V Power Consumption CY37128CY37384 Typical 5.0V Power Consumption CY37256Typical 3.3V Power Consumption CY37032V Typical 5.0V Power Consumption CY37512CY37128V Typical 3.3V Power Consumption CY37064VCY37256V Typical 3.3V Power Consumption CY37192VCY37512V Typical 3.3V Power Consumption CY37384VPin Tqfp A44 Top View Pin Configurations20Pin Plcc J67 / Clcc Y67 Top View Lead Plcc J83 / Clcc Y84 Top View Ball Fine-Pitch BGA BA50 Top ViewLead Tqfp A100 Top View Ball Fine-Pitch BGA BB100 for CY37128V Top View Ball Fine-Pitch BGA BB100 for CY37064V Top ViewCLK3/I4 GND TDO I/O Lead Tqfp A160 for CY37192V Top ViewI/O I/O I/O I/O I/O I/O I/O I/O Lead Pqfp N208 / Cqfp U208 Top ViewBall Pbga BG292 Top View Ball Fine-Pitch BGA BB256 Top View Lead Pbga BG388 Top View Ball Fine-Pitch BGA BB400 Top View 0V Ordering Information Ordering InformationLead Plastic Leaded Chip Carrier CY37064P84-154JC CY37128P84-167JC Lead Plastic Quad Flat Pack CY37256P256-154BGC 3V Ordering Information BB100 Lead Plastic Quad Flat Pack CY37256VP256-100BGC Lead Lead Pb-Free Thin Plastic Quad Flat Pack A44 Package DiagramsLead Lead Pb-Free Plastic Leaded Chip Carrier J67 Lead Ceramic Leaded Chip Carrier Y67 Lead Lead Pb-Free Plastic Leaded Chip Carrier J83 Ball 7.0 mm x 7.0 mm x 1.2 mm, 0.80 pitch Thin BGA BA48DLead Ceramic Leaded Chip Carrier Y84 Lead Lead Pb-Free Thin Plastic Quad Flat Pack Tqfp A100 Ball Thin Ball Grid Array 11 x 11 x 1.4 mm BB100 51-85049-*B Detail a Lead Ceramic Quad Flatpack Cavity Up U162Lead Plastic Quad Flatpack N208 Lead Ceramic Quad Flatpack Cavity Up U208 Bottom View Ball Fbga 17 x 17 mm BB256Ball Plastic Ball Grid Array Pbga 27 x 27 x 2.33 mm BG292 Ball Plastic Ball Grid Array Pbga 35 x 35 x 2.33 mm BG388 Ball Fbga 21 x 21 x 1.4 mm BB400 Commercial Addendum 3V Operating Range3V ± Document History Issue Orig. Description of Change Date