Cypress CY7C1576V18, CY7C1565V18, CY7C1563V18 Maximum Ratings, DC Electrical Characteristics

Page 20

CY7C1561V18, CY7C1576V18 CY7C1563V18, CY7C1565V18

Maximum Ratings

Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested.

Storage Temperature ................................. –65°C to +150°C

Ambient Temperature with Power Applied.. –55°C to +125°C

Supply Voltage on VDD Relative to GND		–0.5V to +2.9V
Supply Voltage on VDDQ Relative to GND		–0.5V to +VDD
DC Applied to Outputs in High-Z	–0.5V to VDDQ + 0.3V
DC Input Voltage [14]	–0.5V to V + 0.3V
		DD

Current into Outputs (LOW)				20 mA
Static Discharge Voltage (MIL-STD-883, M. 3015)...				>2001V
Latch-up Current		....................................................		>200 mA
Operating Range

		Ambient	VDD [18]	VDDQ [18]
Range		Temperature (TA)	VDD [18]	VDDQ [18]
Commercial		0°C to +70°C	1.8 ± 0.1V	1.4V to
				VDD
Industrial		–40°C to +85°C		VDD

Electrical Characteristics

DC Electrical Characteristics

Over the Operating Range [15]

Parameter	Description	Test Conditions			Min	Typ	Max	Unit
VDD	Power Supply Voltage				1.7	1.8	1.9	V
VDDQ	IO Supply Voltage				1.4	1.5	VDD	V
VOH	Output HIGH Voltage	Note 19			VDDQ/2 – 0.12		VDDQ/2 + 0.12	V
VOL	Output LOW Voltage	Note 20			VDDQ/2 – 0.12		VDDQ/2 + 0.12	V
VOH(LOW)	Output HIGH Voltage	IOH = −0.1 mA, Nominal Impedance			VDDQ – 0.2		VDDQ	V
VOL(LOW)	Output LOW Voltage	IOL = 0.1mA, Nominal Impedance			VSS		0.2	V
VIH	Input HIGH Voltage [14]				VREF + 0.1		VDDQ + 0.15	V
VIL	Input LOW Voltage [14]				–0.15		VREF – 0.1	V
IX	Input Leakage Current	GND ≤ VI ≤ VDDQ			−2		2	μA
IOZ	Output Leakage Current	GND ≤ VI ≤ VDDQ, Output Disabled			−2		2	μA
VREF	Input Reference Voltage [21]	Typical Value = 0.75V			0.68	0.75	0.95	V
IDD [22]	VDD Operating Supply	VDD = Max,	400 MHz	x8			1400	mA
		IOUT = 0 mA,
		IOUT = 0 mA,		x9			1400
		f = fMAX = 1/tCYC
		f = fMAX = 1/tCYC		x18			1400
				x18			1400

				x36			1400

			375 MHz	x8			1300	mA

				x9			1300

				x18			1300

				x36			1300

Notes

18.Power up: Assumes a linear ramp from 0V to VDD(min) within 200 ms. During this time VIH < VDD and VDDQ < VDD.

19.Output are impedance controlled. IOH = −(VDDQ/2)/(RQ/5) for values of 175 ohms <= RQ <= 350 ohms.

20.Output are impedance controlled. IOL = (VDDQ/2)/(RQ/5) for values of 175 ohms <= RQ <= 350 ohms.

21.VREF (min) = 0.68V or 0.46VDDQ, whichever is larger, VREF (max) = 0.95V or 0.54VDDQ, whichever is smaller.

22.The operation current is calculated with 50% read cycle and 50% write cycle.

Document Number: 001-05384 Rev. *F

Page 20 of 28

[+] Feedback

Image 20

Contents Features Configurations Selection GuideFunctional Description Description 400 MHz 375 MHz 333 MHz 300 MHz UnitDoff Logic Block Diagram CY7C1561V18Logic Block Diagram CY7C1576V18 Logic Block Diagram CY7C1563V18 Logic Block Diagram CY7C1565V18Pin Configuration Ball Fbga 15 x 17 x 1.4 mm PinoutCY7C1561V18 8M x CY7C1576V18 8M xCY7C1565V18 2M x CY7C1563V18 4M xWPS BWS Negative Input Clock Input Pin DefinitionsPin Name Pin Description Power Supply Inputs to the Core of the Device Power Supply Inputs for the Outputs of the DeviceTDO for Jtag TCK Pin for JtagFunctional Overview Read OperationsWrite Operations Byte Write OperationsValid Data Indicator Qvld Application ExampleDepth Expansion Programmable ImpedanceTruth Table Write Cycle DescriptionsOperation CommentsWrite cycle description table for CY7C1576V18 follows Write cycle description table for CY7C1565V18 followsDevice Into the device. D359 remains unalteredIeee 1149.1 Serial Boundary Scan Jtag Idcode TAP Controller State Diagram State diagram for the TAP controller followsTAP Controller Block Diagram TAP Electrical CharacteristicsTAP AC Switching Characteristics TAP Timing and Test ConditionsIdentification Register Definitions Scan Register SizesInstruction Codes Register Name Bit SizeBoundary Scan Order Bit # Bump IDDLL Constraints Power Up Sequence in QDR-II+ SramPower Up Sequence Maximum Ratings Electrical CharacteristicsDC Electrical Characteristics Automatic Power down Max VDD 400 MHz VDD Operating Supply VDD = Max 333 MHz300 MHz Current Both Ports DeselectedAC Electrical Characteristics CapacitanceThermal Resistance Parameter Description Test Conditions Max UnitSwitching Characteristics Consortium Description 400 MHz 375 MHz 333 MHz 300 MHz UnitParameter Min Max HighSwitching Waveforms Read/Write/Deselect Sequence 31, 32Ordering Information 333 Package Diagram Ball Fbga 15 x 17 x 1.4 mmDocument History