Cypress CYD04S36V, CYD02S36VA, CYD09S36V Instruction Identification Codes Description, Reserved

Page 11

CYD01S36V

CYD02S36V/36VA/CYD04S36V

CYD09S36V/CYD18S36V

Table 6. Instruction Identification Codes

Instruction	Code	Description
EXTEST	0000	Captures the Input/Output ring contents. Places the BSR between the TDI and TDO.

BYPASS	1111	Places the BYR between TDI and TDO.

IDCODE	1011	Loads the IDR with the vendor ID code and places the register between TDI and TDO.

HIGHZ	0111	Places BYR between TDI and TDO. Forces all device output drivers to a High-Z state.

CLAMP	0100	Controls boundary to 1/0. Places BYR between TDI and TDO.

SAMPLE/PRELOAD	1000	Captures the input/output ring contents. Places BSR between TDI and TDO.

NBSRST	1100	Resets the non-boundary scan logic. Places BYR between TDI and TDO.

RESERVED	All other codes	Other combinations are reserved. Do not use other than the above.

Document Number: 38-06076 Rev. *G

Page 11 of 28

[+] Feedback

Image 11

Contents Seamless Migration to Next-Generation Dual-Port Family FeaturesFunctional Description Dual Ported Array Logic Block Diagram1DQ10R DQ12R DQ14R Pin ConfigurationsPin Definitions Address Counter and Mask Register Operations19 Master ResetMailbox Interrupts Operation Description Counter Reset OperationCounter Load Operation CLK Mrst CNT/MSK Cntrst ADS CntenCounter Interrupt Mask Reset OperationCounter Increment Operation Counter Hold OperationCounter, Mask, and Mirror Logic Block Diagram1 Boundary Scan Hierarchy for 9-Mbit and 18-Mbit Devices Performing a TAP ResetIeee 1149.1 Serial Boundary Scan JTAG23 Performing a Pause/RestartScan Register Sizes Register Name Bit Size Scan Chain for 18-Mbit DeviceReserved Instruction Identification Codes DescriptionCapacitance Electrical Characteristics Over the Operating RangeMaximum Ratings Operating RangeSwitching Characteristics Over the Operating Range Parameter Description 167/133/100 Unit Min Port to Port DelaysMaster Reset Timing Jtag TimingSwitching Waveforms Jtag Switching WaveformData OUT CLKAddress Data OUT Read No Operation Write ADDRESSB1Address B2 ADS DatainDataout Read WriteADS Cnten Address InternalCounter Write Read Reset AddressLoad Readback Increment External Counter Address Internal CLK External Address A0-A16 Internal AddressCLK R CLK LLport Lport DataCNT/MSK ADS Cnten Counter Internal 3FFFC 3FFFD 3FFFE 3FFFF Counter Interrupt and Retransmit17, 45, 53, 54, 55INT R CLK CE0 CE1Clkl Lport 7FFFF AddressOrdering Information Ball Fbga 17 x 17 mm BB256 Package DiagramsBall Fbga 23 mm x 23 mm x 1.7 mm BB256B REV ECN no Sales, Solutions and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Document History