RAD Data comm RIC-E1 operation manual INT/LBT Clock Mode, IR-X.21B, Buffer

RIC-E1Installation and Operation Manual Appendix E IR-X.21B Interface Module

IR-X.21B

TXD

TXC

ETC

RIC-E1

RXC

RXD

INT/LBT Clock Mode

FIFO

Buffer

Tx

FIFO

Buffer

Rx

Figure E-4. EXT Timing Mode

TXD (2, 9)

Signal Timing (RXC) (6, 13)

DTE

ETC (7, 14)

RXD

(4, 11)

The INT/LBT clock mode is used in applications where the IR-X.21B side uses the clock signal from the E1 link. This mode is used mainly when the attached equipment has an X.21 interface, but no ability to produce clock signals. The module has a 16-bit FIFO buffer to compensate for the phase delay introduced by the X.21 device. Figure E-5illustrates the buffer connection and the flow of the receive, transmit and clock signals.

When RIC-E1 operates in the internal or receive clock, you must set the IR-X.21B JP2 jumper to INT/RCV.

TXD

TXC

RIC-E1

RXC

RXD

	IR-X.21B
		TXD
	FIFO	(2, 9)
	Buffer
	Tx	Signal Timing (RXC)
		(6, 13)
		DTE
	FIFO
	Buffer	RXD
	Rx
		(4, 11)
Figure E-5.	INT/LBT Timing Mode

Selecting the IR-X.21B Timing E-3

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