Transcend Information TS32M~1GCF80 dimensions True IDE Mode As Iordy

Page 12

TS32M~1GCF80

 

 

80X CompactFlash Card

 

 

 

 

 

 

 

 

 

 

 

 

-VS1

 

O

33

Voltage Sense Signals. -VS1 is grounded on the Card and sensed by the Host

-VS2

 

 

40

so that the CompactFlash Storage Card CIS can be read at 3.3 volts and -VS2 is

(PC Card Memory Mode)

 

 

 

reserved by PCMCIA for a secondary voltage and is not connected on the Card.

-VS1

 

 

 

This signal is the same for all modes.

-VS2

 

 

 

 

 

(PC Card I/O Mode)

 

 

 

 

 

-VS1

 

 

 

This signal is the same for all modes.

-VS2

 

 

 

 

 

(True IDE Mode)

 

 

 

 

 

-WAIT

 

O

42

The -WAIT signal is driven low by the CompactFlash Storage Card to signal the

(PC Card Memory Mode)

 

 

 

host to delay completion of a memory or I/O cycle that is in progress.

 

 

 

 

 

-WAIT

 

 

 

This signal is the same as the PC Card Memory Mode signal.

(PC Card I/O Mode)

 

 

 

 

 

 

 

 

IORDY

 

 

 

In True IDE Mode, except in Ultra DMA modes, this output signal may be used

(True IDE Mode)

 

 

 

as IORDY.

 

 

 

 

 

 

 

Signal Name

 

Dir.

Pin

Description

 

 

 

 

 

-WE

 

I

36

This is a signal driven by the host and used for strobing memory write data to the

(PC Card Memory Mode)

 

 

 

registers of the CompactFlash Storage Card when the card is configured in the

 

 

 

 

 

memory interface mode. It is also used for writing the configuration registers.

-WE

 

 

 

In PC Card I/O Mode, this signal is used for writing the configuration registers.

(PC Card I/O Mode)

 

 

 

 

 

-WE

 

 

 

In True IDE Mode, this input signal is not used and should be connected to VCC

(True IDE Mode)

 

 

 

by the host.

WP

 

O

24

Memory Mode – The CompactFlash Storage Card does not have a write protect

(PC Card Memory Mode)

 

switch. This signal is held low after the completion of the reset initialization

 

 

 

Write Protect

 

 

 

sequence.

-IOIS16

 

 

 

I/O Operation – When the CompactFlash Storage Card is configured for I/O

(PC Card I/O Mode)

 

 

 

Operation Pin 24 is used for the -I/O Selected is 16 Bit Port (-IOIS16) function. A

 

 

 

 

 

Low signal indicates that a 16 bit or odd byte only operation can be performed at

 

 

 

 

 

the addressed port.

-IOCS16

 

 

 

In True IDE Mode this output signal is asserted low when this device is expecting

 

 

 

 

 

(True IDE Mode)

 

 

 

a word data transfer cycle.

Transcend Information Inc.

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V1.1

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Contents Placement Feature DimensionsDescription 80X CompactFlash CardOrdering Information CHS and CapacityCompactflash Card Specification Block Diagram PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Electrical Interface Pin Assignment and Pin TypeV1.1 Signal Description Signal Name Dir Pin DescriptionCsel V1.1 Iord REG True IDE Mode As Iordy Electrical Specification Input Leakage CurrentInput Characteristics CompactFlash interface I/O at Parameter Symbol Min Max Unit RemarkParameter Min Max UnitOutput Drive Type Output Drive Characteristics Signal Interface Signal Card HostTS32M~1GCF8080X CompactFlash Card 150 μ a high state per socketFigure Attribute Memory Read Timing Diagram Attribute Memory Read TimingConfiguration Register Attribute Memory Write Timing Common Memory Read Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 nsMin Max Symbol Common Memory Write Timing Specification Min SymbolI/O Input Read Timing Specification 80X CompactFlash Card10 I/O Output Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 nsTrue IDE PIO Mode Read/Write Timing Specification ModeV1.1 True IDE Multiword DMA Mode Read/Write Timing Specification Card Configuration Multiple Function CompactFlash Storage CardsCE2 CE1 A10 A8-A4Function Mode Attribute Memory FunctionCE2 CE1 A10 D15-D8 D7-D0 Table CompactFlash Storage Card Configurations Configuration Option RegisterBase + 00h in Attribute MemoryPin Replacement Register Base + 04h in Attribute Memory Table Pin Replacement Changed Bit/Mask Bit ValuesSocket and Copy Register Base + 06h in Attribute Memory I/O Transfer FunctionTrue IDE Mode I/O Transfer Function Table Pcmcia Mode I/O FunctionCommon Memory Transfer Function Function CodeV1.1 Table I/O Configurations CF-ATA Drive Register Set Definition and ProtocolI/O Primary and Secondary Address Configurations Table Primary and Secondary I/O DecodingContiguous I/O Mapped Addressing Table Contiguous I/O DecodingMemory Mapped Addressing True IDE Mode Addressing CF-ATA RegistersData Register Address 1F0h170hOffset 0,8,9 Error Register Address 1F1h171h Offset 1, 0Dh Read Only Table Data Register AccessFeature Register Address 1F1h171h Offset 1, 0Dh Write Only Sector Count Register Address 1F2h172h OffsetSector Number LBA 7-0 Register Address 1F3h173h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h OffsetDevice Control Register Address 3F6h376h Offset Eh Figure Status & Alternate Status RegisterCard Drive Address Register Address 3F7h377h Offset Fh Figure Device Control RegisterCF-ATA Command Description CF-ATA Command Set LBADefinitions Check Power Mode 98h or E5h Execute Drive Diagnostic 90hBit Command Cyl High Cyl Low Sec Num Sec Cnt FeatureErase Sectors C0h Format Track 50hDrive Head LBA Cyl High Sec Num LBA Sec CntWord Default Total Data Field Type Information Identify Device EchBytes Total Data Field Type Information Word 0 General Configuration Word 1 Default Number of CylindersWord 3 Default Number of Heads Word 6 Default Number of Sectors per TrackWord 49 Capabilities Bit 13 Standby Timer PIO Data Transfer Cycle Timing ModeMultiple Sector Setting Total Sectors Addressable in LBA ModeMultiword DMA transfer Word 64 Advanced PIO transfer modes supportedWord 65 Minimum Multiword DMA transfer cycle time Recommended Multiword DMA transfer cycle timeWords 82-84 Features/command sets supported Words 85-87 Features/command sets enabledWord 68 Minimum PIO transfer cycle time with Iordy Word 91 Advanced power management level value Word 89 Time required for Security erase unit completionWord 128 Security Status Bit 8 Security Level Word 160 Power Requirement Description Value Maximum PIO mode timing selectedAdditional Requirements for CF Advanced Timing Modes Value Maximum Multiword DMA timing mode supported Value Current PIO timing mode selectedValue Current Multiword DMA timing mode selected Value Maximum Pcmcia IO timing mode SupportedDrive Cyl High Cyl Low Sec Num Sec Cnt Feature Idle 97h or E3hIdle Immediate 95h or E1h Initialize Drive Parameters 91hRead Buffer E4h Read DMA C8hRead Multiple C4h Read Sectors 20h or 21h Read Verify Sectors 40h or 41hRecalibrate 1Xh Request Sense 03hTable Extended Error Codes Seek 7XhSet Features EFh Table Feature SupportedSet Multiple Mode C6h Set Sleep Mode- 99h or E6h Standby 96h or E2hStandby Immediate 94h or E0h Translate Sector 87hTableTranslate Sector Information Wear Level F5h Write Buffer E8hWrite DMA CAh Write Multiple Command C5h Write Multiple without Erase CDh Write Sectors 30h or 31hWrite Sectors without Erase 38h Write Verify 3Ch80X CompactFlash Card Error Posting BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERRAddress Data Description of Contents CIS function CIS DescriptionAddress Data 5 4 Description of Contents CIS function Cistplconfig V1.1 MS IR IO RO a Address Data 5 4 3 2 1 Description of Contents CIS function Irqn LS AS NR RO a T
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