Transcend Information TS32M~1GCF80 dimensions Read Buffer E4h, Read DMA C8h

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TS32M~1GCF80

80X CompactFlash Card

 

 

 

5.6.10 Read Buffer - E4h

The Read Buffer command enables the host to read the current contents of the CompactFlash Storage Card’s sector buffer. This command has the same protocol as the Read Sector(s) command.

Bit ->

7

6

5

4

 

3

2

 

1

0

 

 

 

 

 

 

 

 

 

 

 

Command (7)

 

 

 

 

E4h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C/D/H (6)

 

X

 

Drive

 

 

 

X

 

 

 

 

 

 

 

 

 

 

 

 

Cyl High (5)

 

 

 

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Cyl Low (4)

 

 

 

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sec Num (3)

 

 

 

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sec Cnt (2)

 

 

 

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Feature (1)

 

 

 

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5.6.11 Read DMA – C8h

This command uses DMA mode to read from 1 to 256 sectors as specified in the Sector Count register. A sector count of 0 requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. When this command is issued the CompactFlash Storage Card sets BSY, puts all or part of the sector of data in the buffer. The Card is then permitted, although not required, to set DRQ, clear BSY. The Card asserts DMAREQ while data is available to be transferred. The Card asserts DMAREQ while data is available to be transferred. The host then reads the (512 * sector-count) bytes of data from the Card using DMA. While DMAREQ is asserted by the Card, the Host asserts -DMACK while it is ready to transfer data by DMA and asserts -IORD once for each 16 bit word to be transferred to the Host.

Interrupts are not generated on every sector, but upon completion of the transfer of the entire number of sectors to be transferred or upon the occurrence of an unrecoverable error.

At command completion, the Command Block Registers contain the cylinder, head and sector number of the last sector read. If an error occurs, the read terminates at the sector where the error occurred. The Command Block Registers contain the cylinder, head, and sector number of the sector where the error occurred. The amount of data transferred is indeterminate.

When a Read DMA command is received by the Card and 8 bit transfer mode has been enabled by the Set Features command, the Card shall return the Aborted error.

Transcend Information Inc.

59

V1.1

Image 59
Contents 80X CompactFlash Card Placement FeatureDimensions DescriptionCHS and Capacity Ordering InformationCompactflash Card Specification Block Diagram Electrical Interface Pin Assignment and Pin Type PC Card Memory Mode PC Card I/O Mode True IDE Mode4V1.1 Signal Name Dir Pin Description Signal DescriptionCsel V1.1 Iord REG True IDE Mode As Iordy Input Leakage Current Electrical SpecificationParameter Symbol Min Max Unit Remark Input Characteristics CompactFlash interface I/O atMin Max Unit ParameterOutput Drive Type Output Drive Characteristics Signal Card Host Signal Interface150 μ a high state per socket TS32M~1GCF8080X CompactFlash CardAttribute Memory Read Timing Figure Attribute Memory Read Timing DiagramConfiguration Register Attribute Memory Write Timing Min Max Symbol Common Memory Read Timing SpecificationCycle Time Mode 250 ns 120 ns 100 ns 80 ns Min Symbol Common Memory Write Timing Specification80X CompactFlash Card I/O Input Read Timing SpecificationCycle Time Mode 255 ns 120 ns 100 ns 80 ns 10 I/O Output Write Timing SpecificationMode True IDE PIO Mode Read/Write Timing SpecificationV1.1 True IDE Multiword DMA Mode Read/Write Timing Specification A10 A8-A4 Card ConfigurationMultiple Function CompactFlash Storage Cards CE2 CE1CE2 CE1 A10 D15-D8 D7-D0 Function ModeAttribute Memory Function Configuration Option RegisterBase + 00h in Attribute Memory Table CompactFlash Storage Card ConfigurationsTable Pin Replacement Changed Bit/Mask Bit Values Pin Replacement Register Base + 04h in Attribute MemoryI/O Transfer Function Socket and Copy Register Base + 06h in Attribute MemoryFunction Code True IDE Mode I/O Transfer FunctionTable Pcmcia Mode I/O Function Common Memory Transfer FunctionV1.1 CF-ATA Drive Register Set Definition and Protocol Table I/O ConfigurationsTable Primary and Secondary I/O Decoding I/O Primary and Secondary Address ConfigurationsTable Contiguous I/O Decoding Contiguous I/O Mapped AddressingMemory Mapped Addressing Data Register Address 1F0h170hOffset 0,8,9 True IDE Mode AddressingCF-ATA Registers Table Data Register Access Error Register Address 1F1h171h Offset 1, 0Dh Read OnlyCylinder Low LBA 15-8 Register Address 1F4h174h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Sector Number LBA 7-0 Register Address 1F3h173h OffsetFigure Status & Alternate Status Register Device Control Register Address 3F6h376h Offset EhFigure Device Control Register Card Drive Address Register Address 3F7h377h Offset FhCF-ATA Command Description LBA CF-ATA Command SetDefinitions Cyl High Cyl Low Sec Num Sec Cnt Feature Check Power Mode 98h or E5hExecute Drive Diagnostic 90h Bit CommandSec Num LBA Sec Cnt Erase Sectors C0hFormat Track 50h Drive Head LBA Cyl HighBytes Word Default Total Data Field Type InformationIdentify Device Ech Total Data Field Type Information Word 6 Default Number of Sectors per Track Word 0 General ConfigurationWord 1 Default Number of Cylinders Word 3 Default Number of HeadsTotal Sectors Addressable in LBA Mode Word 49 Capabilities Bit 13 Standby TimerPIO Data Transfer Cycle Timing Mode Multiple Sector SettingRecommended Multiword DMA transfer cycle time Multiword DMA transferWord 64 Advanced PIO transfer modes supported Word 65 Minimum Multiword DMA transfer cycle timeWord 68 Minimum PIO transfer cycle time with Iordy Words 82-84 Features/command sets supportedWords 85-87 Features/command sets enabled Word 128 Security Status Bit 8 Security Level Word 91 Advanced power management level valueWord 89 Time required for Security erase unit completion Additional Requirements for CF Advanced Timing Modes Word 160 Power Requirement Description Value Maximum PIO mode timing selected Value Maximum Pcmcia IO timing mode Supported Value Maximum Multiword DMA timing mode supportedValue Current PIO timing mode selected Value Current Multiword DMA timing mode selectedInitialize Drive Parameters 91h Drive Cyl High Cyl Low Sec Num Sec Cnt FeatureIdle 97h or E3h Idle Immediate 95h or E1hRead DMA C8h Read Buffer E4hRead Multiple C4h Read Verify Sectors 40h or 41h Read Sectors 20h or 21hRequest Sense 03h Recalibrate 1XhSeek 7Xh Table Extended Error CodesTable Feature Supported Set Features EFhSet Multiple Mode C6h Standby 96h or E2h Set Sleep Mode- 99h or E6hTableTranslate Sector Information Standby Immediate 94h or E0hTranslate Sector 87h Write DMA CAh Wear Level F5hWrite Buffer E8h Write Multiple Command C5h Write Sectors 30h or 31h Write Multiple without Erase CDhWrite Verify 3Ch Write Sectors without Erase 38hBBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERR 80X CompactFlash Card Error PostingCIS Description Address Data Description of Contents CIS functionAddress Data 5 4 Description of Contents CIS function Cistplconfig V1.1 MS IR IO RO a Address Data 5 4 3 2 1 Description of Contents CIS function Irqn LS AS NR RO a T