Transcend Information TS32M~1GCF80 dimensions V1.1

Page 6

TS32M~1GCF80

80X CompactFlash Card

 

 

 

 

 

 

Pin

Num

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

PC Card Memory Mode

 

 

PC Card I/O Mode

 

 

True IDE Mode4

 

 

 

 

 

 

 

 

 

 

 

Signal Name

Pin

 

In, Out

Pin

Signal Name

Pin

In, Out

Pin

Signal Name

Pin

Type

 

Type

Num

Type

Type

Num

Type

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-VS1

O

 

Ground

33

-VS1

O

Ground

33

-VS1

O

 

 

 

 

 

 

 

 

 

 

 

-IORD

I

 

I3U

34

-IORD

I

I3U

34

-IORD

I

-IOWR

I

 

I3U

35

-IOWR

I

I3U

35

-IOWR

I

-WE

I

 

I3U

36

-WE

I

I3U

36

-WE3

I

 

 

 

 

 

 

 

 

 

 

 

READY

O

 

OT1

37

-IREQ

O

OT1

37

INTRQ

O

VCC

 

 

Power

38

VCC

 

Power

38

VCC

 

 

 

 

 

 

 

 

 

 

 

 

-CSEL5

I

 

I2Z

39

-CSEL5

I

I2Z

39

-CSEL

I

-VS2

O

 

OPEN

40

-VS2

O

OPEN

40

-VS2

O

RESET

I

 

I2Z

41

RESET

I

I2Z

41

-RESET

I

-WAIT

O

 

OT1

42

-WAIT

O

OT1

42

IORDY

O

 

 

 

 

 

 

 

 

 

 

 

-INPACK

O

 

OT1

43

-INPACK

O

OT1

43

DMARQ

O

 

 

 

 

 

 

 

 

 

 

 

-REG

I

 

I3U

44

-REG

I

I3U

44

-DMACK 6

I

 

 

 

 

 

 

 

 

 

 

 

BVD2

O

 

OT1

45

-SPKR

O

OT1

45

-DASP

I/O

BVD1

O

 

OT1

46

-STSCHG

O

OT1

46

-PDIAG

I/O

D081

I/O

 

I1Z,

47

D081

I/O

I1Z,

47

D081

I/O

 

 

 

OZ3

 

 

 

OZ3

 

 

 

D091

I/O

 

I1Z,

48

D091

I/O

I1Z,

48

D091

I/O

 

 

 

OZ3

 

 

 

OZ3

 

 

 

D101

I/O

 

I1Z,

49

D101

I/O

I1Z,

49

D101

I/O

 

 

 

OZ3

 

 

 

OZ3

 

 

 

GND

 

 

Ground

50

GND

 

Ground

50

GND

 

In, Out

Type

Ground

I3Z

I3Z

I3U

OZ1

Power

I2U

OPEN

I2Z

ON1

OZ1

I3U

I1U, ON1 I1U, ON1 I1Z, OZ3 I1Z, OZ3 I1Z, OZ3 Ground

Note:

1) These signals are required only for 16 bit accesses and not required when installed in 8 bit systems. Devices

should allow for 3-state signals not to consume current.

2)The signal should be grounded by the host.

3)The signal should be tied to VCC by the host.

4)The mode is required for CompactFlash Storage Cards.

5)The -CSEL signal is ignored by the card in PC Card modes. However, because it is not pulled upon the card in these modes, it should not be left floating by the host in PC Card modes. In these modes, the pin should be connected by the host to PC Card A25 or grounded by the host.

6)If DMA operations are not used, the signal should be held high or tied to VCC by the host. For proper operation in older hosts: while DMA operations are not active, the card shall ignore this signal,including a floating condition

Transcend Information Inc.

6

V1.1

Image 6
Contents Description Placement FeatureDimensions 80X CompactFlash CardOrdering Information CHS and Capacity Compactflash Card Specification Block Diagram PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Electrical Interface Pin Assignment and Pin TypeV1.1 Signal Description Signal Name Dir Pin DescriptionCsel V1.1 Iord REG True IDE Mode As Iordy Electrical Specification Input Leakage CurrentInput Characteristics CompactFlash interface I/O at Parameter Symbol Min Max Unit RemarkParameter Min Max UnitOutput Drive Type Output Drive Characteristics Signal Interface Signal Card HostTS32M~1GCF8080X CompactFlash Card 150 μ a high state per socketFigure Attribute Memory Read Timing Diagram Attribute Memory Read TimingConfiguration Register Attribute Memory Write Timing Common Memory Read Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 nsMin Max Symbol Common Memory Write Timing Specification Min SymbolI/O Input Read Timing Specification 80X CompactFlash Card10 I/O Output Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 nsTrue IDE PIO Mode Read/Write Timing Specification ModeV1.1 True IDE Multiword DMA Mode Read/Write Timing Specification CE2 CE1 Card ConfigurationMultiple Function CompactFlash Storage Cards A10 A8-A4Function Mode Attribute Memory FunctionCE2 CE1 A10 D15-D8 D7-D0 Table CompactFlash Storage Card Configurations Configuration Option RegisterBase + 00h in Attribute MemoryPin Replacement Register Base + 04h in Attribute Memory Table Pin Replacement Changed Bit/Mask Bit ValuesSocket and Copy Register Base + 06h in Attribute Memory I/O Transfer FunctionCommon Memory Transfer Function True IDE Mode I/O Transfer FunctionTable Pcmcia Mode I/O Function Function CodeV1.1 Table I/O Configurations CF-ATA Drive Register Set Definition and ProtocolI/O Primary and Secondary Address Configurations Table Primary and Secondary I/O DecodingContiguous I/O Mapped Addressing Table Contiguous I/O DecodingMemory Mapped Addressing True IDE Mode Addressing CF-ATA RegistersData Register Address 1F0h170hOffset 0,8,9 Error Register Address 1F1h171h Offset 1, 0Dh Read Only Table Data Register AccessSector Number LBA 7-0 Register Address 1F3h173h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h OffsetDevice Control Register Address 3F6h376h Offset Eh Figure Status & Alternate Status RegisterCard Drive Address Register Address 3F7h377h Offset Fh Figure Device Control RegisterCF-ATA Command Description CF-ATA Command Set LBADefinitions Bit Command Check Power Mode 98h or E5hExecute Drive Diagnostic 90h Cyl High Cyl Low Sec Num Sec Cnt FeatureDrive Head LBA Cyl High Erase Sectors C0hFormat Track 50h Sec Num LBA Sec CntWord Default Total Data Field Type Information Identify Device EchBytes Total Data Field Type Information Word 3 Default Number of Heads Word 0 General ConfigurationWord 1 Default Number of Cylinders Word 6 Default Number of Sectors per TrackMultiple Sector Setting Word 49 Capabilities Bit 13 Standby TimerPIO Data Transfer Cycle Timing Mode Total Sectors Addressable in LBA ModeWord 65 Minimum Multiword DMA transfer cycle time Multiword DMA transferWord 64 Advanced PIO transfer modes supported Recommended Multiword DMA transfer cycle timeWords 82-84 Features/command sets supported Words 85-87 Features/command sets enabledWord 68 Minimum PIO transfer cycle time with Iordy Word 91 Advanced power management level value Word 89 Time required for Security erase unit completionWord 128 Security Status Bit 8 Security Level Word 160 Power Requirement Description Value Maximum PIO mode timing selectedAdditional Requirements for CF Advanced Timing Modes Value Current Multiword DMA timing mode selected Value Maximum Multiword DMA timing mode supportedValue Current PIO timing mode selected Value Maximum Pcmcia IO timing mode SupportedIdle Immediate 95h or E1h Drive Cyl High Cyl Low Sec Num Sec Cnt FeatureIdle 97h or E3h Initialize Drive Parameters 91hRead Buffer E4h Read DMA C8hRead Multiple C4h Read Sectors 20h or 21h Read Verify Sectors 40h or 41hRecalibrate 1Xh Request Sense 03hTable Extended Error Codes Seek 7XhSet Features EFh Table Feature SupportedSet Multiple Mode C6h Set Sleep Mode- 99h or E6h Standby 96h or E2hStandby Immediate 94h or E0h Translate Sector 87hTableTranslate Sector Information Wear Level F5h Write Buffer E8hWrite DMA CAh Write Multiple Command C5h Write Multiple without Erase CDh Write Sectors 30h or 31hWrite Sectors without Erase 38h Write Verify 3Ch80X CompactFlash Card Error Posting BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERRAddress Data Description of Contents CIS function CIS DescriptionAddress Data 5 4 Description of Contents CIS function Cistplconfig V1.1 MS IR IO RO a Address Data 5 4 3 2 1 Description of Contents CIS function Irqn LS AS NR RO a T