Transcend Information TS32M~1GCF80 Write Multiple without Erase CDh, Write Sectors 30h or 31h

Page 70

TS32M~1GCF80		80X CompactFlash Card

Errors encountered during Write Multiple commands are posted after the attempted writes of theblock or partial block transferred. The Write command ends with the sector in error, even if it is in the middle of a block. Subsequent blocks are not transferred in the event of an error. Interrupts are generated when DRQ is set at the beginning of each block or partial block.

The Command Block Registers contain the cylinder, head and sector numbers of the sector where the error occurred. The Sector Count Register contains the residual number of sectors that need to be transferred for successful completion of the command, e.g., each block has 4 sectors, a request for 8 sectors is issued and an error occurs on the third sector. The Sector Count Register contains 6 and the address is that of the third sector.

5.6.28 Write Multiple without Erase – CDh

This command is similar to the Write Multiple command with the exception that an implied erase before write operation is not performed. The sectors should be pre-erased with the Erase Sector(s) command before this command is issued.

5.6.29 Write Sector(s) - 30h or 31h

This command writes from 1 to 256 sectors as specified in the Sector Count Register. A sector count of zero requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. When this command is accepted, the CompactFlash Storage Card sets BSY, then sets DRQ and clears BSY, then waits for the host to fill the sector buffer with the data to be written. No interrupt is generated to start the first host transfer operation. No data should be transferred by the host until BSY has been cleared by the host.

For multiple sectors, after the first sector of data is in the buffer, BSY shall be set and DRQ shall be cleared. After the next buffer is ready for data, BSY is cleared, DRQ is set and an interrupt is generated. When the final sector of data is transferred, BSY is set and DRQ is cleared. It shall remain in this state until the command is completed at which time BSY is cleared and an interrupt is generated.

Transcend Information Inc.

70

V1.1

Image 70

Contents Description Placement FeatureDimensions 80X CompactFlash CardOrdering Information CHS and CapacityCompactflash Card Specification Block Diagram PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Electrical Interface Pin Assignment and Pin TypeV1.1 Signal Description Signal Name Dir Pin DescriptionCsel V1.1 Iord REG True IDE Mode As Iordy Electrical Specification Input Leakage CurrentInput Characteristics CompactFlash interface I/O at Parameter Symbol Min Max Unit RemarkParameter Min Max UnitOutput Drive Type Output Drive Characteristics Signal Interface Signal Card HostTS32M~1GCF8080X CompactFlash Card 150 μ a high state per socketFigure Attribute Memory Read Timing Diagram Attribute Memory Read TimingConfiguration Register Attribute Memory Write Timing Cycle Time Mode 250 ns 120 ns 100 ns 80 ns Common Memory Read Timing SpecificationMin Max Symbol Common Memory Write Timing Specification Min SymbolI/O Input Read Timing Specification 80X CompactFlash Card10 I/O Output Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 nsTrue IDE PIO Mode Read/Write Timing Specification ModeV1.1 True IDE Multiword DMA Mode Read/Write Timing Specification CE2 CE1 Card ConfigurationMultiple Function CompactFlash Storage Cards A10 A8-A4Attribute Memory Function Function ModeCE2 CE1 A10 D15-D8 D7-D0 Table CompactFlash Storage Card Configurations Configuration Option RegisterBase + 00h in Attribute MemoryPin Replacement Register Base + 04h in Attribute Memory Table Pin Replacement Changed Bit/Mask Bit ValuesSocket and Copy Register Base + 06h in Attribute Memory I/O Transfer FunctionCommon Memory Transfer Function True IDE Mode I/O Transfer FunctionTable Pcmcia Mode I/O Function Function CodeV1.1 Table I/O Configurations CF-ATA Drive Register Set Definition and ProtocolI/O Primary and Secondary Address Configurations Table Primary and Secondary I/O DecodingContiguous I/O Mapped Addressing Table Contiguous I/O DecodingMemory Mapped Addressing CF-ATA Registers True IDE Mode AddressingData Register Address 1F0h170hOffset 0,8,9 Error Register Address 1F1h171h Offset 1, 0Dh Read Only Table Data Register AccessSector Number LBA 7-0 Register Address 1F3h173h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h OffsetDevice Control Register Address 3F6h376h Offset Eh Figure Status & Alternate Status RegisterCard Drive Address Register Address 3F7h377h Offset Fh Figure Device Control RegisterCF-ATA Command Description CF-ATA Command Set LBADefinitions Bit Command Check Power Mode 98h or E5hExecute Drive Diagnostic 90h Cyl High Cyl Low Sec Num Sec Cnt FeatureDrive Head LBA Cyl High Erase Sectors C0hFormat Track 50h Sec Num LBA Sec CntIdentify Device Ech Word Default Total Data Field Type InformationBytes Total Data Field Type Information Word 3 Default Number of Heads Word 0 General ConfigurationWord 1 Default Number of Cylinders Word 6 Default Number of Sectors per TrackMultiple Sector Setting Word 49 Capabilities Bit 13 Standby TimerPIO Data Transfer Cycle Timing Mode Total Sectors Addressable in LBA ModeWord 65 Minimum Multiword DMA transfer cycle time Multiword DMA transferWord 64 Advanced PIO transfer modes supported Recommended Multiword DMA transfer cycle timeWords 85-87 Features/command sets enabled Words 82-84 Features/command sets supportedWord 68 Minimum PIO transfer cycle time with Iordy Word 89 Time required for Security erase unit completion Word 91 Advanced power management level valueWord 128 Security Status Bit 8 Security Level Value Maximum PIO mode timing selected Word 160 Power Requirement DescriptionAdditional Requirements for CF Advanced Timing Modes Value Current Multiword DMA timing mode selected Value Maximum Multiword DMA timing mode supportedValue Current PIO timing mode selected Value Maximum Pcmcia IO timing mode SupportedIdle Immediate 95h or E1h Drive Cyl High Cyl Low Sec Num Sec Cnt FeatureIdle 97h or E3h Initialize Drive Parameters 91hRead Buffer E4h Read DMA C8hRead Multiple C4h Read Sectors 20h or 21h Read Verify Sectors 40h or 41hRecalibrate 1Xh Request Sense 03hTable Extended Error Codes Seek 7XhSet Features EFh Table Feature SupportedSet Multiple Mode C6h Set Sleep Mode- 99h or E6h Standby 96h or E2hTranslate Sector 87h Standby Immediate 94h or E0hTableTranslate Sector Information Write Buffer E8h Wear Level F5hWrite DMA CAh Write Multiple Command C5h Write Multiple without Erase CDh Write Sectors 30h or 31hWrite Sectors without Erase 38h Write Verify 3Ch80X CompactFlash Card Error Posting BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERRAddress Data Description of Contents CIS function CIS DescriptionAddress Data 5 4 Description of Contents CIS function Cistplconfig V1.1 MS IR IO RO a Address Data 5 4 3 2 1 Description of Contents CIS function Irqn LS AS NR RO a T